Test set selection for structural faults in analog IC's

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 7, 1999, Pages 1026-1039

  Devarayanadurg, Giri ^a   Soma, Mani ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; LINEAR INTEGRATED CIRCUITS; MONTE CARLO METHODS; OPTIMIZATION; PROBLEM SOLVING; RANDOM PROCESSES; SENSITIVITY ANALYSIS;

ANALOG INTEGRATED CIRCUITS; FAULT COVERAGE; FAULT SEPARATION;

INTEGRATED CIRCUIT TESTING;

EID: 0032684498     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.771183     Document Type: Article

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