Regenerative pass-transistor logic: A circuit technique for high speed digital design

IEICE Transactions on Electronics

Volumn E79-C, Issue 9, 1996, Pages 1274-1282

  Cheung, Tsz Shing ^a   Asada, Kunihiro ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

Arithmetic logic design; Dual rail logic; Logic gates; Monte carlo method; Pass transistor logic

Indexed keywords

DIGITAL ARITHMETIC; DIGITAL CIRCUITS; LOGIC CIRCUITS; LOGIC GATES; MATHEMATICAL MODELS; MONTE CARLO METHODS; TRANSISTORS;

COMPLEMENTARY PASS TRANSISTOR LOGIC; CONDITIONAL CARRY SELECT CIRCUITS; DUAL RAIL CIRCUITS; REGENERATIVE PASS TRANSISTOR LOGIC;

LOGIC DESIGN;

EID: 0030233902     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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