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Volumn 27, Issue 4, 1992, Pages 473-484

Low-Power CMOS Digital Design

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTING SILICON--APPLICATIONS; SEMICONDUCTOR DEVICES, MOS--APPLICATIONS; TRANSISTORS--APPLICATIONS;

EID: 0026853681     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.126534     Document Type: Article
Times cited : (1838)

References (28)
  • 1
    • 0026155982 scopus 로고
    • Incredible shrinking computers
    • May
    • T. Bell, “Incredible shrinking computers,” IEEE Spectrum, pp. 37–43, May 1991.
    • (1991) IEEE Spectrum. , pp. 37-43
    • Bell, T.1
  • 2
    • 84941477940 scopus 로고
    • Advances in rechargeable batteries pace portable computer growth
    • Eager, “Advances in rechargeable batteries pace portable computer growth,” in Proc. Silicon Valley Personal Comput. Conf., 1991, pp. 693–697.
    • (1991) Proc. Silicon Valley Personal Comput. Conf. , pp. 693-697
  • 3
    • 84941447367 scopus 로고
    • Design considerations for a future multimedia terminal
    • Oct., WINLAB Workshop (Rutgers Univ., New Brunswick, NJ)
    • A. Chandrakasan, S. Sheng, and R. W. Brodersen, “Design considerations for a future multimedia terminal,” presented at the 1990 WINLAB Workshop (Rutgers Univ., New Brunswick, NJ), Oct. 1990.
    • (1990) presented at the
    • Chandrakasan, A.1    Sheng, S.2    Brodersen, R.W.3
  • 5
    • 84941450931 scopus 로고
    • Silicon multichip modules
    • Aug., Santa Clara, CA
    • D. Benson et al., “Silicon multichip modules,” presented at the Hot Chips Symp. III, Santa Clara, CA, Aug. 1990.
    • (1990) presented at the Hot Chips Symp
    • Benson, D.1
  • 7
    • 84910481232 scopus 로고
    • Design considerations for singlechip computers of the future
    • Feb., Feb, also IEEE Trans. Comput
    • D. A. Patterson and C. H. Sequin, “Design considerations for singlechip computers of the future,” IEEEJ. Solid-State Circuits, vol. SC-15, no. 1, Feb. 1980; also IEEE Trans. Comput., vol. C-29, no. 2, pp. 108–116, Feb. 1980.
    • (1980) IEEEJ. Solid-State Circuits , vol.SC-15 , Issue.1 , pp. 108-116
    • Patterson, D.A.1    Sequin, C.H.2
  • 8
    • 0025419522 scopus 로고
    • A 3.8-ns CMOS 16 x 16 multiplier using complementary pass transistor logic
    • Apr.
    • K. Yano et al., “A 3.8-ns CMOS 16 x 16 multiplier using complementary pass transistor logic,” IEEEJ. Solid-State Circuits, vol. 25, pp. 388–395, Apr. 1990.
    • (1990) IEEEJ. Solid-State Circuits , vol.25 , pp. 388-395
    • Yano, K.1
  • 9
    • 0021477994 scopus 로고
    • Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits
    • Aug.
    • H. J. M. Veendrick, “Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits,” IEEE J. Solid-State Circuits, vol. SC-19, pp. 468–473, Aug. 1984.
    • (1984) IEEE J. Solid-State Circuits , vol.SC-19 , pp. 468-473
    • Veendrick, H.J.M.1
  • 13
    • 0025533477 scopus 로고
    • A fully asynchronous digital signal processor using self-timed circuits
    • Dec.
    • G. Jacobs and R. W. Brodersen, “A fully asynchronous digital signal processor using self-timed circuits,” IEEE J. Solid-State Circuits, vol. 25, pp. 1526–1537, Dec. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 1526-1537
    • Jacobs, G.1    Brodersen, R.W.2
  • 17
    • 0025578245 scopus 로고
    • 0.1um CMOS devices using low-impurity-channel transistors (LICT)
    • M. Aoki et al., “0.1um CMOS devices using low-impurity-channel transistors (LICT),,, in IEDM Tech. Dig., 1990, pp. 939–941.
    • (1990) IEDM Tech. Dig. , pp. 939-941
    • Aoki, M.1
  • 18
    • 0026396320 scopus 로고
    • Limitations, innovations, and challenges of circuits devices into half-micron and beyond
    • M. Nagata, “Limitations, innovations, and challenges of circuits devices into half-micron and beyond,” in Proc. Symp. VLSI Circuits, 1991, 39–42.
    • (1991) Proc. Symp. VLSI Circuits , pp. 39-42
    • Nagata, M.1
  • 20
    • 0023401701 scopus 로고
    • A comparison of CMOS circuit techniques: Differential cascode voltage switch logic versus conventional logic
    • Aug.
    • K. Chu and D. Pulfrey, “A comparison of CMOS circuit techniques: Differential cascode voltage switch logic versus conventional logic,” IEEEJ. Solid-State Circuits, vol. SC-22, pp. 528–532, Aug. 1987.
    • (1987) IEEEJ. Solid-State Circuits , vol.SC-22 , pp. 528-532
    • Chu, K.1    Pulfrey, D.2
  • 22
    • 84941437504 scopus 로고
    • LagerlV cell library documentation
    • June, Res. Lab., Univ. Calif., Berkeley
    • R. W. Brodersen etal., “LagerlV cell library documentation,” Electron. Res. Lab., Univ. Calif., Berkeley, June 23, 1988.
    • (1988) Electron
    • Brodersen, R.W.1
  • 23
    • 4243132732 scopus 로고
    • A high performance 0.25pm CMOS technology
    • B. Davari et al., “A high performance 0.25pm CMOS technology,” in IEDM Tech. Dig., 1988, pp. 56–59.
    • (1988) IEDM Tech. Dig. , pp. 56-59
    • Davari, B.1
  • 24
    • 0025474203 scopus 로고
    • Power-supply voltage impact on circuit performance for half and lower submicrometer CMOS LSI
    • Aug.
    • M. Kakumu and M. Kinugawa, “Power-supply voltage impact on circuit performance for half and lower submicrometer CMOS LSI,” IEEE Trans. Electron Devices, vol. 37, no. 8, pp. 1902–1908, Aug. 1990.
    • (1990) IEEE Trans. Electron Devices , vol.37 , Issue.8 , pp. 1902-1908
    • Kakumu, M.1    Kinugawa, M.2
  • 25
    • 33747823593 scopus 로고
    • Designing high performance systems to run from 3.3 V or lower sources
    • D. Dahle, “Designing high performance systems to run from 3.3 V or lower sources,” in Proc. Silicon Valley Personal Comput. Conf., 1991. pp. 685–691.
    • (1991) Proc. Silicon Valley Personal Comput. Conf. , pp. 685-691
    • Dahle, D.1
  • 26
    • 0015330654 scopus 로고
    • Ion-implanted complementary MOS transistors in low-voltage circuits
    • Apr.
    • R. Swansan and J. Meindl, “Ion-implanted complementary MOS transistors in low-voltage circuits,” IEEE J. Solid-State Circuits, vol. SC-7, pp. 146–153, Apr. 1972.
    • (1972) IEEE J. Solid-State Circuits , vol.SC-7 , pp. 146-153
    • Swansan, R.1    Meindl, J.2
  • 28
    • 0027088778 scopus 로고
    • Optimizing resource utilization using transformations
    • Nov.
    • M. Potkonjak and J. Rabaey, “Optimizing resource utilization using transformations,” in Proc. ICCAD, Nov. 1991, pp. 88–91.
    • (1991) Proc. ICCAD. , pp. 88-91
    • Potkonjak, M.1    Rabaey, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.