-
3
-
-
33747485489
-
-
Prepared by Mixed-Signal Working Group of the Test Technology Technical Com-mittee of the IEEE Comput. Soc., Oct. 1998.
-
P1149.4/D20 Draft Standard for a Mixed-Signal Test Bus, Prepared by Mixed-Signal Working Group of the Test Technology Technical Com-mittee of the IEEE Comput. Soc., Oct. 1998.
-
P1149.4/D20 Draft Standard for A Mixed-Signal Test Bus
-
-
-
4
-
-
0027801442
-
Structure and metrology for an analog testability bus
-
1993 Int. Test Conf., Baltimore, MD, Oct. 1993, pp. 309-322.
-
K. P. Parker, J. E. McDermid, and S. Oresjo, "Structure and metrology for an analog testability bus," in Proc. 1993 Int. Test Conf., Baltimore, MD, Oct. 1993, pp. 309-322.
-
Proc.
-
-
Parker, K.P.1
McDermid, J.E.2
Oresjo, S.3
-
5
-
-
0027833209
-
Toward a test standard for board and system level mixed-signal interconnects
-
1993 Int. Test Conf., Baltimore, MD, Oct. 1993, pp. 300-308.
-
C. W. Thatcher and R. E. Tulloss, "Toward a test standard for board and system level mixed-signal interconnects," in Proc. 1993 Int. Test Conf., Baltimore, MD, Oct. 1993, pp. 300-308.
-
Proc.
-
-
Thatcher, C.W.1
Tulloss, R.E.2
-
6
-
-
0030419315
-
Proposal to simplify development of a mixed signal test standard
-
1996 Int. Test Conf., Washington, DC, Oct. 1996, pp. 400-409.
-
L. Whetsel, "Proposal to simplify development of a mixed signal test standard," in Proc. 1996 Int. Test Conf., Washington, DC, Oct. 1996, pp. 400-409.
-
Proc.
-
-
Whetsel, L.1
-
7
-
-
0030389114
-
A method of extending an 1149.1 bus for mixed-signal testing
-
1996 Int. Test Conf., Washington, DC, Oct. 1996, pp. 410-416.
-
R. J. Russell, "A method of extending an 1149.1 bus for mixed-signal testing," in Proc. 1996 Int. Test Conf., Washington, DC, Oct. 1996, pp. 410-416.
-
Proc.
-
-
Russell, R.J.1
-
8
-
-
0030397945
-
Metrology for analog module testing using analog testability bus, in 1996
-
1996, pp. 594-599.
-
C. Su, Y. T. Chen, S. J. Jou, and Y. T. Ting, "Metrology for analog module testing using analog testability bus," in 1996 Int. Conf. Computer-Aided Design, San Jose, CA, Nov. 1996, pp. 594-599.
-
Int. Conf. Computer-Aided Design, San Jose, CA, Nov.
-
-
Su, C.1
Chen, Y.T.2
Jou, S.J.3
Ting, Y.T.4
-
9
-
-
33747456578
-
Toward a mixed-signal testability bus standard PI 149.4
-
1993 Ear. Test Conf., Rotterdam, The Netherlands, April 1993, pp. 58-65.
-
B. R. Wilkins, S. Oresjo, and B. S. Suparjo, "Toward a mixed-signal testability bus standard PI 149.4," in Proc. 1993 Ear. Test Conf., Rotterdam, The Netherlands, April 1993, pp. 58-65.
-
Proc.
-
-
Wilkins, B.R.1
Oresjo, S.2
Suparjo, B.S.3
-
10
-
-
2742515971
-
Structure and metrology for a single-wire analog testability bus
-
1994 Int. Test Conf., Washington, DC, Oct. 1994, pp. 919-928.
-
Y. Lu, W. Mao, R. Dandapani, and R. K. Gultai, "Structure and metrology for a single-wire analog testability bus," in Proc. 1994 Int. Test Conf., Washington, DC, Oct. 1994, pp. 919-928.
-
Proc.
-
-
Lu, Y.1
Mao, W.2
Dandapani, R.3
Gultai, R.K.4
-
11
-
-
0029514412
-
Integration of IEEE Std 1149.1 and mixed-signal test architectures
-
1995 Int. Test Conf., Washington, DC, Oct. 1995, pp. 569-576.
-
D. J. Cheek and R. Dandapani, "Integration of IEEE Std 1149.1 and mixed-signal test architectures," in Proc. 1995 Int. Test Conf., Washington, DC, Oct. 1995, pp. 569-576.
-
Proc.
-
-
Cheek, D.J.1
Dandapani, R.2
-
12
-
-
0008094060
-
Time-domain electromagnetic analysis of interconnects in a computer chip package
-
vol. 40, pp. 2155-2163, Dec. 1992.
-
W. D. Becker, P. H. Harms, and R. Mittra, "Time-domain electromagnetic analysis of interconnects in a computer chip package," IEEE Trans. Microwave Theory Tech., vol. 40, pp. 2155-2163, Dec. 1992.
-
IEEE Trans. Microwave Theory Tech.
-
-
Becker, W.D.1
Harms, P.H.2
Mittra, R.3
-
13
-
-
33747475672
-
The impulse response fault model and fault extraction for functional level analog circuit diagnosis, in / 995
-
1995, pp. 361-366.
-
C. Su, S. H. Chiang, and S. J. Jou, "The impulse response fault model and fault extraction for functional level analog circuit diagnosis," in / 995 Int. Conf. Computer-Aided Design, San Jose, CA, Nov. 1995, pp. 361-366.
-
Int. Conf. Computer-Aided Design, San Jose, CA, Nov.
-
-
Su, C.1
Chiang, S.H.2
Jou, S.J.3
-
14
-
-
0025418047
-
An optimization technique for iterative frequency-domain deconvolution
-
358-362, Apr. 1990.
-
A. Bennia and S. M. Riad, "An optimization technique for iterative frequency-domain deconvolution," IEEE Trans. Instrum. Meas., pp. 358-362, Apr. 1990.
-
IEEE Trans. Instrum. Meas., Pp.
-
-
Bennia, A.1
Riad, S.M.2
-
15
-
-
0017542202
-
-
1428-1443, Oct. 1977.
-
D. GChilderse/aJ.,"Thecepstrum: A guide to processing," Proc. IEEE, pp. 1428-1443, Oct. 1977.
-
Proc. IEEE, Pp.
-
-
-
18
-
-
2742515971
-
Structure and metrology for a single-wire analog testability bus
-
1994 Int. Test Conf., Washington, DC, Oct. 1994, pp. 919-928.
-
Y. Lu, W. Mao, R. Dandapani, and R. K. Gulati, "Structure and metrology for a single-wire analog testability bus," in Proc. 1994 Int. Test Conf., Washington, DC, Oct. 1994, pp. 919-928.
-
Proc.
-
-
Lu, Y.1
Mao, W.2
Dandapani, R.3
Gulati, R.K.4
-
19
-
-
0031381190
-
Parasitic effect removal for analog measurement in PI 149.4 environment
-
1997 Int. Test Conf., Washington, DC, Nov. 1997, pp. 499-508.
-
C. Su, Y.-T. Chen, and S.-J. Jou, "Parasitic effect removal for analog measurement in PI 149.4 environment," in Proc. 1997 Int. Test Conf., Washington, DC, Nov. 1997, pp. 499-508.
-
Proc.
-
-
Su, C.1
Chen, Y.-T.2
Jou, S.-J.3
-
20
-
-
0032320507
-
Limited access testing: IEEE 1149.4 instrumentation and methods
-
1998 Int. Test Conf., 1998, pp. 388-395.
-
J. McDermid, "Limited access testing: IEEE 1149.4 instrumentation and methods," in Proc. 1998 Int. Test Conf., 1998, pp. 388-395.
-
Proc.
-
-
McDermid, J.1
-
21
-
-
0031354472
-
IEEE PI 149.4-Almost a standard
-
1997Int. Test Conf., 1997, pp. 174-182.
-
A. Cron, "IEEE PI 149.4-Almost a standard," in Proc. 1997Int. Test Conf., 1997, pp. 174-182.
-
Proc.
-
-
Cron, A.1
-
23
-
-
0033316675
-
The integration of boundary-scan test methods to a mixedsignal environment
-
1999 Int. Test Conf., Atlantic City, NJ, L Sept. 1999, pp. 159-162. fc
-
A. W. Ley, "The integration of boundary-scan test methods to a mixedsignal environment," in Proc. 1999 Int. Test Conf., Atlantic City, NJ, L Sept. 1999, pp. 159-162. fc
-
Proc.
-
-
Ley, A.W.1
|