Metrology for analog module testing using analog testability bus

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1996, Pages 594-599

  Su, Chauchin ^a   Chen, Yue Tsang ^a   Jou, Shyh Jye ^a   Ting, Yuan Tzu ^a  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK ANALYSIS; ROBUSTNESS (CONTROL SYSTEMS); WAVEFORM ANALYSIS;

ANALOG MODULES; ANALOG TESTABILITY BUS; PARASITIC EFFECT; TEST RESPONSE ANALYSIS;

INTEGRATED CIRCUIT TESTING;

EID: 0030397945     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)