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Volumn , Issue , 1993, Pages 309-322
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Structure and metrology for an analog testability bus
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
DIGITAL INTEGRATED CIRCUITS;
ELECTRIC NETWORK TOPOLOGY;
FAILURE ANALYSIS;
INTEGRATED CIRCUIT LAYOUT;
MEASUREMENTS;
NETWORK COMPONENTS;
SHORT CIRCUIT CURRENTS;
STANDARDS;
ANALOG TESTABILITY BUS;
DISCRETE ANALOG COMPONENTS;
IEEE 1149.1 STANDARD;
INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE);
TESTABILITY STRUCTURE;
INTEGRATED CIRCUIT TESTING;
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EID: 0027801442
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (32)
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References (25)
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