On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 7, 1997, Pages 770-776

  Métra, Cecilia ^a   Favalli, Michèle ^a   Olivo, Piero ^a   Riccö, Bruno ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FAULT CURRENTS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT LAYOUT;

BRIDGING FAULTS; DELAY FAULTS; SELF CHECKING CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0031175881     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.644039     Document Type: Article

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