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Volumn , Issue , 1997, Pages 166-172

FPGA-based implementation of a fault-tolerant neural architecture for photon identification

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CHARGE COUPLED DEVICES; COMPUTER ARCHITECTURE; ERROR DETECTION; LOGIC DESIGN; LOGIC GATES; NEURAL NETWORKS; PATTERN RECOGNITION; PHOTODETECTORS; PHOTONS; RADIATION COUNTERS;

EID: 0030711195     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (15)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.