Test of RAM-based FPGA: Methodology and application to the interconnect

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1997, Pages 230-237

  Renovell, M ^a   Figueras, J ^a   Zorian, Y ^a  

^a LIRMM   (France)

Author keywords

[No Author keywords available]

Indexed keywords

INTERCONNECTION NETWORKS; LOGIC GATES; RANDOM ACCESS STORAGE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

INTEGRATED CIRCUIT TESTING;

EID: 0030652669     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)