Reconfigurable hardware SAT solvers: A survey of systems

IEEE Transactions on Computers

Volumn 53, Issue 11, 2004, Pages 1449-1461

  Skliarova, Iouliia ^a   Ferrari, António de Brito ^a  

^a UNIVERSITY OF AVEIRO   (Portugal)

Author keywords

Boolean satisfiability; FPGA; Hardware acceleration; Reconfigurable computing

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMBINATORIAL MATHEMATICS; COMPUTABILITY AND DECIDABILITY; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC DESIGN; LOGIC DEVICES; MATHEMATICAL MODELS; OPTIMIZATION; SYSTEMS ANALYSIS;

BOOLEAN SATISFIABILITY; COMBINATORIAL OPTIMIZATION PROBLEMS; HARDWARE ACCELERATION; HIGH CAPACITY PROGRAMMABLE LOGIC DEVICES; RECONFIGURABLE COMPUTING;

BOOLEAN FUNCTIONS;

EID: 8744233904     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2004.102     Document Type: Article

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