A scalable, loadable custom programmable logic device for solving Boolean satisfiability problems

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2000-January, Issue , 2000, Pages 13-21

  Boyd, Mark J ^a   Larrabee, Tracy ^a  

^a University of California Santa Cruz   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTERS; HARDWARE; LOGIC DEVICES; LOGIC SYNTHESIS; MODEL CHECKING; PROBLEM SOLVING; PROGRAMMABLE LOGIC CONTROLLERS;

BOOLEAN SATISFIABILITY; BOOLEAN SATISFIABILITY PROBLEMS; COMMERCIAL APPLICATIONS; MASSIVELY PARALLELS; PLACEMENT AND ROUTING; PROGRAMMABLE LOGIC DEVICE; TEST PATTERN GENERATIONS; TIMING VERIFICATION;

FORMAL LOGIC;

EID: 0006534010     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2000.903388     Document Type: Conference Paper

References (25)

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