Acceleration of satisfiability algorithms by reconfigurable hardware

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1482, Issue , 1998, Pages 69-78

  Platzner, Marco ^a   De Micheli, Giovanni ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER HARDWARE; COMPUTER SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FORMAL LOGIC;

BENCHMARK SUITES; BOOLEAN SATISFIABILITY PROBLEMS; FPGA TECHNOLOGY; HARDWARE COMPILATION; PROTOTYPE IMPLEMENTATIONS; SATISFIABILITY ALGORITHMS; SATISFIABILITY SOLVERS; SPECIFIC HARDWARE;

RECONFIGURABLE HARDWARE;

EID: 65849432527     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0055234     Document Type: Conference Paper

References (10)

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