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Volumn 66, Issue 3, 2017, Pages 488-501

Power Density-Aware Resource Management for Heterogeneous Tiled Multicores

Author keywords

dark silicon; Heterogeneous multicores; low power design; power density; resource management; thermal management

Indexed keywords

ELECTRIC POWER SUPPLIES TO APPARATUS; NATURAL RESOURCES MANAGEMENT; TEMPERATURE CONTROL;

EID: 85013066354     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2016.2595560     Document Type: Article
Times cited : (56)

References (41)
  • 1
    • 84903133549 scopus 로고    scopus 로고
    • Exploring the heterogeneous design space for both performance and reliability
    • R. Ubal, et al., "Exploring the heterogeneous design space for both performance and reliability," in Proc. 51st Des. Autom. Conf., 2014, pp. 1-6.
    • (2014) Proc. 51st Des. Autom. Conf. , pp. 1-6
    • Ubal, R.1
  • 2
    • 84969349598 scopus 로고    scopus 로고
    • [Online]
    • Exynos 5 octa (5422). [Online]. Available: http://www.samsung.com/exynos
    • Exynos 5 Octa (5422)
  • 4
    • 79955424857 scopus 로고    scopus 로고
    • The greendroid mobile application processor: An architecture for silicon's dark future
    • Mar./Apr.
    • N. Goulding-Hotta, et al., "The greendroid mobile application processor: An architecture for silicon's dark future," IEEE Micro, vol. 31, no. 2, pp. 86-95, Mar./Apr. 2011.
    • (2011) IEEE Micro , vol.31 , Issue.2 , pp. 86-95
    • Goulding-Hotta, N.1
  • 6
    • 84910646869 scopus 로고    scopus 로고
    • TSP: Thermal safe power-efficient power budgeting for many-core systems in dark silicon
    • S. Pagani, et al., "TSP: Thermal safe power-efficient power budgeting for many-core systems in dark silicon," in Proc. Int. Conf. Hardware/Softw. Codesign Syst. Synthesis, 2014, pp. 10:1-10:10.
    • (2014) Proc. Int. Conf. Hardware/Softw. Codesign Syst. Synthesis , pp. 1-10
    • Pagani, S.1
  • 11
    • 80054813906 scopus 로고    scopus 로고
    • Performance optimal online DVFS and task migration techniques for thermally constrained multi-core processors
    • Nov.
    • V. Hanumaiah, S. Vrudhula, and K. Chatha, "Performance optimal online DVFS and task migration techniques for thermally constrained multi-core processors," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 30, no. 11, pp. 1677-1690, Nov. 2011.
    • (2011) IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. , vol.30 , Issue.11 , pp. 1677-1690
    • Hanumaiah, V.1    Vrudhula, S.2    Chatha, K.3
  • 12
    • 84944128141 scopus 로고    scopus 로고
    • Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips
    • H. Khdr, S. Pagani, M. Shafique, and J. Henkel, "Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips," in Proc. 52nd Des. Autom. Conf., 2015, pp. 1-6.
    • (2015) Proc. 52nd Des. Autom. Conf. , pp. 1-6
    • Khdr, H.1    Pagani, S.2    Shafique, M.3    Henkel, J.4
  • 13
    • 84958547396 scopus 로고    scopus 로고
    • Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach
    • Rahmani, et al., "Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach," in IEEE/ACM Int. Symp. Low Power Electron. Des., 2015, pp. 219-224.
    • (2015) IEEE/ACM Int. Symp. Low Power Electron. Des. , pp. 219-224
    • Rahmani1
  • 16
    • 84942433915 scopus 로고    scopus 로고
    • Procrustes: Power constrained performance improvement using extended maximizethen-swap algorithm
    • Oct.
    • G. Liu, J. Park, and D. Marculescu, "Procrustes: Power constrained performance improvement using extended maximizethen-swap algorithm," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 34, no. 10, pp. 1664-1676, Oct. 2015.
    • (2015) IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. , vol.34 , Issue.10 , pp. 1664-1676
    • Liu, G.1    Park, J.2    Marculescu, D.3
  • 20
    • 78650037215 scopus 로고    scopus 로고
    • Runtime thermal management using software agents for multi- and many-core architectures
    • Nov./Dec.
    • M. A. Faruque, J. Jahn, T. Ebi, and J. Henkel, "Runtime thermal management using software agents for multi- and many-core architectures," IEEE Des. Test Comput., vol. 27, no. 6, pp. 58-68, Nov./Dec. 2010.
    • (2010) IEEE Des. Test Comput. , vol.27 , Issue.6 , pp. 58-68
    • Faruque, M.A.1    Jahn, J.2    Ebi, T.3    Henkel, J.4
  • 22
    • 84881300403 scopus 로고    scopus 로고
    • Big.LITTLE processing with ARM Cortex-A15 & Cortex-A7
    • Sep.
    • P. Greenhalgh, "big.LITTLE processing with ARM Cortex-A15 & Cortex-A7," ARM Limited, White Paper, Sep. 2011.
    • (2011) ARM Limited, White Paper
    • Greenhalgh, P.1
  • 23
    • 84905978304 scopus 로고    scopus 로고
    • Invasive tightly-coupled processor arrays: A domain-specific architecture/compiler co-design approach
    • F. Hannig, V. Lari, S. Boppu, A. Tanase, and O. Reiche, "Invasive tightly-coupled processor arrays: A domain-specific architecture/compiler co-design approach," ACM Trans. Embedded Comput. Syst., vol. 13, no. 4s, pp. 133:1-133:29, 2014.
    • (2014) ACM Trans. Embedded Comput. Syst. , vol.13 , Issue.4 S , pp. 1-29
    • Hannig, F.1    Lari, V.2    Boppu, S.3    Tanase, A.4    Reiche, O.5
  • 24
    • 36949040798 scopus 로고    scopus 로고
    • Analysis of dynamic voltage/frequency scaling in chip-multiprocessors
    • S. Herbert and D. Marculescu, "Analysis of dynamic voltage/frequency scaling in chip-multiprocessors," in Proc. Int. Symp. Low Power Electron. Des., 2007, pp. 38-43.
    • (2007) Proc. Int. Symp. Low Power Electron. Des. , pp. 38-43
    • Herbert, S.1    Marculescu, D.2
  • 25
    • 84945930678 scopus 로고    scopus 로고
    • Predictive dynamic thermal and powermanagement for heterogeneousmobile platforms
    • G. Singla, G. Kaur, A. K. Unver, and U. Y. Ogras, "Predictive dynamic thermal and powermanagement for heterogeneousmobile platforms," in Proc. Des. Autom. Test Eur., 2015, pp. 960-965.
    • (2015) Proc. Des. Autom. Test Eur. , pp. 960-965
    • Singla, G.1    Kaur, G.2    Unver, A.K.3    Ogras, U.Y.4
  • 28
    • 77950629423 scopus 로고    scopus 로고
    • Powerpack: Energy profiling and analysis of high-performance systems and applications
    • May
    • R. Ge, X. Feng, S. Song, H.-C. Chang, D. Li, and K. Cameron, "Powerpack: Energy profiling and analysis of high-performance systems and applications," IEEE Trans. Parallel Distrib. Syst., vol. 21, no. 5, pp. 658-671, May 2010.
    • (2010) IEEE Trans. Parallel Distrib. Syst. , vol.21 , Issue.5 , pp. 658-671
    • Ge, R.1    Feng, X.2    Song, S.3    Chang, H.-C.4    Li, D.5    Cameron, K.6
  • 33
    • 0029749330 scopus 로고    scopus 로고
    • Scheduling of partitioned regular algorithms on processor arrays with constrained resources
    • Aug.
    • J. Teich, L. Thiele, and L. Zhang, "Scheduling of partitioned regular algorithms on processor arrays with constrained resources," in Proc. Int. Conf. Appl.-Specific Syst., Archit. Processors, Aug. 1996, pp. 131-144.
    • (1996) Proc. Int. Conf. Appl.-Specific Syst., Archit. Processors , pp. 131-144
    • Teich, J.1    Thiele, L.2    Zhang, L.3
  • 34
    • 84920260561 scopus 로고    scopus 로고
    • Symbolic mapping of loop programs onto processor arrays
    • J. Teich, A. Tanase, and F. Hannig, "Symbolic mapping of loop programs onto processor arrays," J. Signal Process. Syst., vol. 77, pp. 31-59, 2014.
    • (2014) J. Signal Process. Syst. , vol.77 , pp. 31-59
    • Teich, J.1    Tanase, A.2    Hannig, F.3
  • 35
    • 84859464490 scopus 로고    scopus 로고
    • The gem5 simulator
    • Aug.
    • Binkert, et al., "The gem5 simulator," SIGARCH Comput. Archit. News, vol. 39, no. 2, pp. 1-7, Aug. 2011.
    • (2011) SIGARCH Comput. Archit. News , vol.39 , Issue.2 , pp. 1-7
    • Binkert1
  • 37
    • 85013136717 scopus 로고    scopus 로고
    • [Online]
    • ODROID-XU3. [Online]. Available: http://hardkernel.com
    • ODROID-XU3
  • 40
    • 67649185317 scopus 로고    scopus 로고
    • Power-efficient reconfiguration control in coarse-grained dynamically reconfigurable architectures
    • D. Kissler, A. Strawetz, F. Hannig, and J. Teich, "Power-efficient reconfiguration control in coarse-grained dynamically reconfigurable architectures," J. Low Power Electron., vol. 5, pp. 96-105, 2009.
    • (2009) J. Low Power Electron , vol.5 , pp. 96-105
    • Kissler, D.1    Strawetz, A.2    Hannig, F.3    Teich, J.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.