ATE-amenable test data compression with no cyclic scan registers

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn 2003-January, Issue , 2003, Pages 151-158

  Hashempour, Hamidreza ^a   Lombardi, Fabrizio ^a  

^a NORTHEASTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; DEFECTS; DESIGN FOR TESTABILITY; EQUIPMENT TESTING; EXTRACTION; FAULT TOLERANCE; RECONFIGURABLE HARDWARE;

AUTOMATIC TEST EQUIPMENT; BENCHMARK CIRCUIT; CORRELATION EXTRACTION; DATA COMPRESSION TECHNIQUES; MEMORY UTILIZATION; NEW CORRELATIONS; TEST DATA COMPRESSION; VECTOR PROCESSING;

DATA COMPRESSION;

EID: 84971350700     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TSM.2005.1250107     Document Type: Conference Paper

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