HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM

2014 IEEE High Performance Extreme Computing Conference, HPEC 2014

Volumn , Issue , 2014, Pages

  Akin, Berkin ^a   Hoe, James C ^a   Franchetti, Franz ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; ENERGY EFFICIENCY; HARDWARE; MATRIX ALGEBRA; MEMORY ARCHITECTURE; THREE DIMENSIONAL INTEGRATED CIRCUITS;

COMMON OPERATIONS; DATA REORGANIZATION; DATA-INTENSIVE APPLICATION; HARDWARE-ACCELERATED; MEMORY ACCESS PATTERNS; PERFORMANCE OPTIMIZATIONS; SYSTEM UTILIZATION; TRANSFORM ALGORITHM;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 84946692636     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPEC.2014.7040954     Document Type: Conference Paper

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