Memory bandwidth efficient two-dimensional fast Fourier transform algorithm and implementation for large problem sizes

Proceedings of the 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, FCCM 2012

Volumn , Issue , 2012, Pages 188-191

  Akin, Berkin ^a   Milder, Peter A ^a   Franchetti, Franz ^a   Hoe, James C ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

2D DFT; 2D FFT; DRAM; FPGA; Memory Bandwidth

Indexed keywords

2D-DFT; ACCESS PATTERNS; ALGORITHM DESIGN; CONCURRENT PROCESSING; DATA PATH DESIGN; DESIGN CONSIDERATIONS; FAST FOURIER TRANSFORM ALGORITHM; FPGA-BASED IMPLEMENTATION; LARGE DATASETS; MEMORY BANDWIDTHS; OFF-CHIP; OFF-CHIP MEMORIES; ON CHIPS; POWER EFFICIENCY; PROBLEM SIZE; PROCESSING CAPABILITY; SCALABLE IMPLEMENTATION;

BANDWIDTH; COMPUTERS; DYNAMIC RANDOM ACCESS STORAGE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PROGRAM PROCESSORS; TWO DIMENSIONAL;

FAST FOURIER TRANSFORMS;

EID: 84864952164     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2012.40     Document Type: Conference Paper

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