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Volumn 2004-January, Issue January, 2004, Pages 114-119

HotSpot Cache: Joint Temporal and Spatial Locality Exploitation for I-Cache Energy Reduction

Author keywords

Embedded Systems; Instruction Cache; Low Power Design

Indexed keywords

CACHE MEMORY; DESIGN; ELECTRIC POWER SUPPLIES TO APPARATUS; ENERGY CONSERVATION; LOW POWER ELECTRONICS; POWER ELECTRONICS;

EID: 84932139349     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPE.2004.240812     Document Type: Conference Paper
Times cited : (35)

References (16)
  • 11
    • 16244415729 scopus 로고    scopus 로고
    • Instruction fetch energy reduction using loop caches for embedded applications with small tight loops
    • August
    • L. H. Lee, W. Moyer, and J. Arends. Instruction fetch energy reduction using loop caches for embedded applications with small tight loops. In Proceedings of International Symposium on Low Power Design, pages 63-68, August 1999.
    • (1999) Proceedings of International Symposium on Low Power Design , pp. 63-68
    • Lee, L.H.1    Moyer, W.2    Arends, J.3
  • 13
    • 0030285348 scopus 로고    scopus 로고
    • A 160-mhz, 32-b, 0.5-w cmos risc microprocessor
    • November
    • J. Montanaro and et al. A 160-mhz, 32-b, 0.5-w cmos risc microprocessor. IEEE Journal of Solid State Circuits, 31(11):1703-1714, November 1996.
    • (1996) IEEE Journal of Solid State Circuits , vol.31 , Issue.11 , pp. 1703-1714
    • Montanaro, J.1
  • 15
    • 0035183294 scopus 로고    scopus 로고
    • Design of a predictive filter cache for energy savings in high performance processor architectures
    • Austin, Texas, USA
    • W. Tang, R. Gupta, and A. Nicolau. Design of a predictive filter cache for energy savings in high performance processor architectures. In International Conference on Computer Design(ICCD), Austin, Texas, USA, 2001.
    • (2001) International Conference on Computer Design(ICCD)
    • Tang, W.1    Gupta, R.2    Nicolau, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.