Design of a predictive filter cache for energy savings in high performance processor architectures

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2001, Pages 68-73

  Tang, W ^a   Gupta, R ^a   Nicolau, A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SOFTWARE REUSABILITY; DIGITAL FILTERS; LOGIC DESIGN; PROGRAM PROCESSORS;

PREDICTIVE FILTER CACHE;

CACHE MEMORY;

EID: 0035183294     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

1. UltraSparc-IIi: Expanding the boundaries of system on a chip
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3. Using dynamic cache management techniques to reduce energy in a high-performance processor
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5. Confidence estimation for speculation control
6. Way-predicting set-associative cache for high performance and low energy consumption
7. The Alpha 21264 microprocessor
8. The filter cache: An energy efficient memory structure
9. Trace cache: A low latency approach to high bandwidth instruction fetching
10. A multi-level memory system architecture for high-performance dsp applications