Analysis of oxide traps in nanoscale MOSFETs using random telegraph noise

Bias Temperature Instability for Devices and Circuits

Volumn 9781461479093, Issue , 2014, Pages 111-134

  Frank, David J ^a   Miki, Hiroshi ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

HIDDEN MARKOV MODELS; HYSTERESIS; MOSFET DEVICES; TELEGRAPH;

BIAS STRESS; HIDDEN MARKOV MODELING ALGORITHMS; HIGH-K/METAL GATES; MOSFETS; MULTIPLE TRAPS; NANOSCALE MOSFETS; OXIDE TRAPS; RANDOM TELEGRAPH NOISE; TIME-CONSTANTS; TRAP PARAMETERS;

STATIC RANDOM ACCESS STORAGE;

EID: 84929614314     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-1-4614-7909-3_5     Document Type: Chapter

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