Memristor crossbar based multicore neuromorphic processors

International System on Chip Conference

Volumn , Issue , 2014, Pages 383-389

  Taha, Tarek M ^a   Hasan, Raqibul ^a   Yakopcic, Chris ^a  

^a UNIVERSITY OF DAYTON   (United States)

Author keywords

device; memory; Memristor; SPICE

Indexed keywords

COMPUTATION THEORY; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; LEARNING ALGORITHMS; MEMRISTORS; NETWORK ARCHITECTURE; PATTERN RECOGNITION; SPICE;

DEVICE; HIGH PERFORMANCE COMPUTING; LINEARLY SEPARABLE; LOGIC FUNCTIONS; MEMRISTOR; NEURAL NETWORK LEARNING ALGORITHM; NEUROMORPHIC CIRCUITS; SYSTEM-LEVEL PERFORMANCE;

MULTILAYER NEURAL NETWORKS;

EID: 84911888517     PISSN: 21641676     EISSN: 21641706     Source Type: Conference Proceeding    
DOI: 10.1109/SOCC.2014.6948959     Document Type: Conference Paper

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