Algorithmic time, energy, and power on candidate HPC compute building blocks

Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS

Volumn , Issue , 2014, Pages 447-457

  Choi, Jee ^a   Dukhan, Marat ^a   Liu, Xing ^a   Vuduc, Richard ^a  

^a Georgia Institute of Technology   (United States)

Author keywords

algorithms; energy; performance modeling; power; system balance

Indexed keywords

ALGORITHMS; ARM PROCESSORS; DISTRIBUTED PARAMETER NETWORKS; RANDOM ACCESS STORAGE; SYSTEM-ON-CHIP;

ENERGY; HIGH PERFORMANCE COMPUTING SYSTEMS; MEMORY HIERARCHY; MICRO-BENCHMARKING; PERFORMANCE MODEL; POWER; POWER CHARACTERISTIC; RANDOM MEMORY ACCESS;

AUXILIARY POWER SYSTEMS;

EID: 84906717631     PISSN: 15302075     EISSN: 23321237     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2014.54     Document Type: Conference Paper

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