NoC-Sprinting: Interconnect for fine-grained sprinting in the dark silicon era

Proceedings - Design Automation Conference

Volumn , Issue , 2014, Pages

  Zhan, Jia ^a   Xie, Yuan ^a   Sun, Guangyu ^b  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

^b PEKING UNIVERSITY   (China)

Author keywords

Computational Sprinting; Dark Silicon; Network on Chip

Indexed keywords

COMPUTER AIDED DESIGN; INTEGRATED CIRCUIT INTERCONNECTS; MICROPROCESSOR CHIPS; SERVERS; SILICON; THERMOANALYSIS; VLSI CIRCUITS;

COMPUTATIONAL SPRINTING; DARK SILICONS; DISRUPTIVE INNOVATIONS; NETWORK-ON-CHIP DESIGN; POWER EFFICIENT; THROUGHPUT IMPROVEMENT; UTILIZATION WALLS; WORKLOAD CHARACTERISTICS;

NETWORK-ON-CHIP;

EID: 84903210936     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2593069.2593165     Document Type: Conference Paper

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