Accurate formulas for the capacitance of tapered-through silicon vias in 3-D ICs

IEEE Microwave and Wireless Components Letters

Volumn 24, Issue 5, 2014, Pages 294-296

  Lu, Qijun ^a   Zhu, Zhangming ^a   Yang, Yintang ^a   Ding, Ruixue ^a  

^a XIDIAN UNIVERSITY   (China)

Author keywords

3 D ICs; Capacitance; conformal mapping method; tapered through silicon vias (T TSVs)

Indexed keywords

CONFORMAL MAPPING; ELECTRIC FIELDS; INTEGRATED CIRCUITS; THREE DIMENSIONAL;

3-D ICS; ANALYTICAL RESULTS; CONFORMAL MAPPING METHOD; LOCAL ELECTRIC FIELD; NON-UNIFORM DISTRIBUTION; SILICON SUBSTRATES; TAPERED-THROUGH SILICON VIAS (T-TSVS); THREE-DIMENSIONAL STRUCTURE;

CAPACITANCE;

EID: 84901012321     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/LMWC.2014.2309075     Document Type: Article

References (8)

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