Closed-form expressions for the resistance and the inductance of different profiles of through-silicon vias

IEEE Electron Device Letters

Volumn 32, Issue 3, 2011, Pages 393-395

  Liang, Yuanjun ^a   Li, Ye ^a  

^a SHENZHEN INSTITUTES OF ADVANCED TECHNOLOGY   (China)

Author keywords

Closed form expressions; parasitic resistance and inductance; through silicon vias (TSVs)

Indexed keywords

CLOSED-FORM EXPRESSION; FITTING PARAMETERS; GEOMETRIC PARAMETER; HIGH FREQUENCY; LOW FREQUENCY; MAXIMUM ERROR; PARASITIC RESISTANCE AND INDUCTANCE; PARASITIC RESISTANCES; THROUGH SILICON VIAS; THROUGH-SILICON VIAS (TSVS);

ERRORS;

INDUCTANCE;

EID: 79951949566     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2010.2099203     Document Type: Article

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