High-frequency gate-all-around vertical InAs nanowire MOSFETs on Si substrates

IEEE Electron Device Letters

Volumn 35, Issue 5, 2014, Pages 518-520

  Johansson, Sofia ^a   Memisevic, Elvedin ^a   Wernersson, Lars Erik ^a   Lind, Erik ^a  

^a LUND UNIVERSITY   (Sweden)

Author keywords

III V; InAs.; MOSFET; Nanowire; RF; transistor

Indexed keywords

GATE DIELECTRICS; HETEROJUNCTION BIPOLAR TRANSISTORS; NANOWIRES; SILICON; SUBSTRATES; TRANSISTORS;

GATE CAPACITANCE; HIGH FREQUENCY HF; III-V; INAS; MAXIMUM OSCILLATION FREQUENCY; MOS-FET; RF; SMALL SIGNAL MODEL;

MOSFET DEVICES;

EID: 84899986783     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2014.2310119     Document Type: Article

References (13)

1. J. Lin, X. Zhao, T.Yu et al., "A new self-aligned quantum-well MOSFET architechture fabricated by a scalable tight-ptich process," in Proc. IEDM, 2013, pp. 421-424.
2. S. W. Chang et al., "InAs N-MOSFET with record performance of ion = 600 ?m/um at Ioff = 100 nA/um (Vd = 0.5 V)," in Proc. IEDM, 2013, pp. 417-420.
3. D. H. Kim et al., "Lg = 60 nm recessed In0.7Ga0.3As metal-oxidesemiconductor field-effect transistors with Al2O3 insulator," Appl. Phys. Lett., vol. 101, no. 22, pp. 223507-1-223507-4, 2012.
4. T. W. Kim et al., "InAs quantum-well MOSFET (Lg = 100 nm) with record high gm, fT and fmax," in Proc. Symp. VLSI Technol. (VLSIT), 2012, pp. 179-180.
5. A. W. Dey et al., "High-performance InAs nanowire MOSFETs," IEEE Electron Device Lett., vol. 33, no. 6, pp. 791-793, Jun. 2012.
6. K. M. Persson et al., "Extrinsic and intrinsic performance of vertical InAs nanowire MOSFETs on Si substrates," IEEE Trans. Electron Devices, vol. 60, no. 9, pp. 2761-2767, Sep. 2013.
7. S. Johansson et al., "RF characterization of vertical InAs nanowire wrapgate transistors integrated on Si substrates," IEEE Trans. Microw. Theory Tech., vol. 59, no. 10, pp. 2733-2738, Oct. 2011.
8. M. Egard et al., "Vertical InAs nanowire wrap gate transistors with ft 7 GHz and fmax 20 GHz," Nano Lett., vol. 10, no. 3, pp. 809-812, 2010.
9. E. Lind and L. E. Wernersson, "Design of RF properties for vertical nanowire MOSFETs," IEEE Trans. Nanotechnol., vol. 10, no. 4, pp. 668-673, Jul. 2011.
10. S. Gorji Ghalamestani, S. Johansson, M. B. Borg et al., "Uniform and position-controlled InAs nanowires on 2" Si substrates for transistor applications," Nanotechnology, vol. 23, no. 1, pp. 015302-1-015302-7, 2011.
11. G. Astromskas, K. Storm, O. Karlstrom et al., "Doping incorporation in InAs nanowires characterized by capacitance measurements," J. Appl. Phys., vol. 108, no. 5, pp. 054306-1-054306-5, 2010.
12. T. Takahashi, K. Takei, E. Adabi et al., "Parallel array InAs nanowire transistors for mechanically bendable, ultrahigh frequency electronics," ACS Nano, vol. 4, no. 10, pp. 5855-5860, 2010.
13. K. Blekker et al., "High-frequency measurements on InAs nanowire field-effect transistors using coplanar waveguide contacts," IEEE Trans. Nanotechnol., vol. 9, no. 4, pp. 432-437, Jul. 2010.