Brawny vs. Wimpy: Evaluation and analysis of modern workloads on heterogeneous processors

Proceedings - IEEE 27th International Parallel and Distributed Processing Symposium Workshops and PhD Forum, IPDPSW 2013

Volumn , Issue , 2013, Pages 74-83

  Gupta, Vishal ^a   Schwan, Karsten ^a  

^a Georgia Institute of Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; ECONOMIC AND SOCIAL EFFECTS; GREEN COMPUTING; PARALLEL PROCESSING SYSTEMS; POWER MANAGEMENT; PROGRAM PROCESSORS;

COMPARATIVE ANALYSIS; DIVERSE APPLICATIONS; EVALUATION AND ANALYSIS; EXPERIMENTAL EVALUATION; EXPERIMENTAL TESTBED; HETEROGENEOUS MULTI-CORES; HETEROGENEOUS PROCESSORS; PERCEIVED PERFORMANCE;

ENERGY EFFICIENCY;

EID: 84899754757     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPSW.2013.130     Document Type: Conference Paper

References (30)

1. F. Ahmad, S. T. Chakradhar, A. Raghunathan, and T. N. Vijaykumar. Tarazu: optimizing mapreduce on heterogeneous clusters. In Proceedings of the seventeenth ASPLOS, pages 61-74. ACM, 2012.
2. D. G. Andersen, J. Franklin, M. Kaminsky, A. Phanishayee, L. Tan, and V. Vasudevan. FAWN: a fast array of wimpy nodes. In Proceedings of the SOSP. ACM, 2009.
3. P. Apparao, R. Iyer, and D. Newell. Implications of cache asymmetry on server consolidation performance. In Proceedings of the IEEE IISWC 2008, pages 24-32, sept. 2008.
4. S. Balakrishnan, R. Rajwar, M. Upton, and K. Lai. The impact of performance asymmetry in emerging multicore architectures. In Proceedings of the 32nd ISCA, Washington, DC, USA, 2005.
5. T. Cao, S. M. Blackburn, T. Gao, and K. S. McKinley. The yin and yang of power and performance for asymmetric hardware and managed software. In Proceedings of the 39th ISCA, pages 225-236, Portland, Oregon, 2012. IEEE Press.
6. N. Chitlur, G. Srinivasa, S. Hahn, P. K. Gupta, D. Reddy, D. Koufaty, P. Brett, A. Prabhakaran, L. Zhao, N. Ijih, S. Subhaschandra, S. Grover, X. Jiang, and R. Iyer. QuickIA: Exploring heterogeneous architectures on real prototypes. In 2012 IEEE 18th HPCA, pages 1-8, feb. 2012.
7. A. Fedorova, J. C. Saez, D. Shelepov, and M. Prieto. Maximizing power efficiency with asymmetric multicore systems. Commun. ACM, 52(12):48-57, Dec. 2009.
8. P. Greenhalgh. Big.LITTLE Processing with ARM CortexTM-A15 & Cortex-A7. White paper, ARM, Sept 2011.
9. V. Gupta, P. Brett, D. Koufaty, D. Reddy, S. Hahn, K. Schwan, and G. Srinivasa. The forgotten 'uncore': on the energy-efficiency of heterogeneous cores. In Proceedings of the 2012 Cconference on Annual Technical Conference, USENIX ATC'12, pages 34-34, Boston, MA, 2012. USENIX Association.
10. V. Gupta, P. Brett, D. Koufaty, D. Reddy, S. Hahn, K. Schwan, and G. Srinivasa. HeteroMates: Providing high dynamic power range on client devices using heterogeneous core grouping. In 2012 IEEE International Green Computing Conference, IGCC'12, San Jose, CA, USA, June 2012. IEEE Press.
11. M. Guthaus, J. Ringenberg, D. Ernst, T. Austin, T. Mudge, and R. Brown. MiBench: A free, commercially representative embedded benchmark suite. In Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop on, pages 3-14, dec. 2001.
12. A. Gutierrez, R. Dreslinski, T. Wenisch, T. Mudge, A. Saidi, C. Emmons, and N. Paver. Full-system analysis and characterization of interactive smartphone applications. In Workload Characterization (IISWC), 2011 IEEE International Symposium on, pages 81-90, nov. 2011.
13. M. D. Hill and M. R. Marty. Amdahl's Law in the Multicore Era. Computer, 41(7):33-38, July 2008.
14. U. H andlzle. Brawny cores still beat wimpy cores, most of the time. Micro, IEEE, 30(4):20-24, july-Aug. 2010.
15. J. Issa and S. Figueira. Performance and power-consumption analysis of mobile internet devices. In IEEE 30th International IPCCC, pages 1-6, nov. 2011.
16. V. Janapa Reddi, B. C. Lee, T. Chilimbi, and K. Vaid. Web search using mobile cores: quantifying and mitigating the price of efficiency. In Proceedings of the 37th ISCA', pages 314-325. ACM, 2010.
17. X. Jiang, A. Mishra, L. Zhao, R. Iyer, Z. Fang, S. Srinivasan, S. Makineni, P. Brett, and C. Das. Access: Smart scheduling for asymmetric cache cmps. In IEEE 17th HPCA, pages 527-538, feb. 2011.
18. D. Koufaty, D. Reddy, and S. Hahn. Bias scheduling in heterogeneous multi-core architectures. In Proceedings of the 5th EuroSys, pages 125-138, New York, NY, USA, 2010. ACM.
19. R. Kumar, K. I. Farkas, N. P. Jouppi, P. Ranganathan, and D. M. Tullsen. Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction. In Proceedings of the 36th MICRO, pages 81-, Washington, DC, USA, 2003.
20. W. Lang, J. M. Patel, and S. Shankar. Wimpy node clusters: what about non-wimpy workloads? In Proceedings of the Sixth International Workshop DaMoN, pages 47-55. ACM, 2010.
21. C. Lee, E. Kim, and H. Kim. The AM-Bench: An Android Multimedia Benchmark Suite. Technical Report GIT-CERCS-12-04, Georgia Institute of Technology, 2012.
22. T. Li, P. Brett, R. Knauerhase, D. Koufaty, D. Reddy, and S. Hahn. Operating system support for overlapping-ISA heterogeneous multi-core architectures. In IEEE 16th HPCA, pages 1-12, 2010.
23. A. Miyoshi, C. Lefurgy, E. Van Hensbergen, R. Rajamony, and R. Rajkumar. Critical power slope: understanding the runtime effects of frequency scaling. In Proceedings of the 16th ICS, 2002.
24. J. Mogul, J. Mudigonda, N. Binkert, P. Ranganathan, and V. Talwar. Using asymmetric single-ISA CMPs to save energy on operating systems. Micro, IEEE, 28(3):26-41, may-june 2008.
25. R. Nathuji and K. Schwan. VPM tokens: virtual machine-Aware power budgeting in datacenters. In Proceedings of the 17th HPDC, pages 119-128. ACM, 2008.
26. NVIDIA Corporation. Variable SMP: A multi-core cpu architecture for low power and high performance. White paper, 2011.
27. S. Polfliet, F. Ryckbosch, and L. Eeckhout. Optimizing the datacenter for data-centric workloads. In Proceedings of the ICS, pages 182-191, New York, NY, USA, 2011. ACM.
28. J. A. Poovey, T. M. Conte, M. Levy, and S. Gal-On. A benchmark characterization of the EEMBC benchmark suite. IEEE Micro, 29(5):18-29, Sept. 2009.
29. J. C. Saez, M. Prieto, A. Fedorova, and S. Blagodurov. A comprehensive scheduler for asymmetric multicore systems. In Eurosys '10, pages 139-152, New York, NY, USA, 2010. ACM.
30. M. Zaharia, A. Konwinski, A. D. Joseph, R. Katz, and I. Stoica. Improving mapreduce performance in heterogeneous environments. In Proceedings of the 8th USENIX OSDI, pages 29-42, Berkeley, CA, USA, 2008. USENIX Association.