Maximizing power efficiency with asymmetric multicore systems

Communications of the ACM

Volumn 52, Issue 12, 2009, Pages 48-57

  Fedorova, Alexandra ^a   Saez, Juan Carlos ^b   Shelepov, Daniel ^c   Prieto, Manuel ^a  

^a SIMON FRASER UNIVERSITY   (Canada)

^b UNIVERSIDAD COMPLUTENSE DE MADRID   (Spain)

^c MICROSOFT   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INSTRUCTION SET ARCHITECTURE; LOW POWER; MULTI-CORE PROCESSOR; MULTI-CORE SYSTEMS; MULTICORE ARCHITECTURES; POWER CHARACTERISTIC; POWER CONSUMPTION; POWER EFFICIENCY; POWER EFFICIENT;

PROGRAM COMPILERS;

SOFTWARE ARCHITECTURE;

EID: 71149110661     PISSN: 00010782     EISSN: 15577317     Source Type: Journal    
DOI: 10.1145/1610252.1610270     Document Type: Article

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