-
2
-
-
27544432558
-
The Impact of Performance Asymmetry in Emerging Multicore Architectures
-
S. Balakrishnan, R. Rajwar, M. Upton, and K. Lai. The Impact of Performance Asymmetry in Emerging Multicore Architectures. SIGARCH CAN, 33(2):506-517, 2005.
-
(2005)
SIGARCH CAN
, vol.33
, Issue.2
, pp. 506-517
-
-
Balakrishnan, S.1
Rajwar, R.2
Upton, M.3
Lai, K.4
-
3
-
-
34247331460
-
Dynamic Thread Assignment on Heterogeneous Multiprocessor Architectures
-
M. Becchi and P. Crowley. Dynamic Thread Assignment on Heterogeneous Multiprocessor Architectures. In Proc. of Computing Frontiers '06, 2006.
-
(2006)
Proc. of Computing Frontiers '06
-
-
Becchi, M.1
Crowley, P.2
-
4
-
-
71149110661
-
Maximizing Power Efficiency with Asymmetric Multicore Systems
-
A. Fedorova, J. C. Saez, D. Shelepov, and M. Prieto. Maximizing Power Efficiency with Asymmetric Multicore Systems. Commun. ACM, 52(12):48-57, 2009.
-
(2009)
Commun. ACM
, vol.52
, Issue.12
, pp. 48-57
-
-
Fedorova, A.1
Saez, J.C.2
Shelepov, D.3
Prieto, M.4
-
5
-
-
48249118853
-
Amdahl's Law in the Multicore Era
-
M. D. Hill and M. R. Marty. Amdahl's Law in the Multicore Era. Computer, 41(7):33-38, 2008.
-
(2008)
Computer
, vol.41
, Issue.7
, pp. 33-38
-
-
Hill, M.D.1
Marty, M.R.2
-
6
-
-
77954592486
-
Bias Scheduling in Heterogeneous Multi-core Architectures
-
D. Koufaty, D. Reddy, and S. Hahn. Bias Scheduling in Heterogeneous Multi-core Architectures. In Proc. of Eurosys '10, 2010.
-
(2010)
Proc. of Eurosys '10
-
-
Koufaty, D.1
Reddy, D.2
Hahn, S.3
-
7
-
-
4644370318
-
Single- ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance
-
R. Kumar, D. M. Tullsen, and P. Ranganathan et al. Single- ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance. In Proc. of ISCA '04.
-
Proc. of ISCA '04
-
-
Kumar, R.1
Tullsen, D.M.2
Ranganathan, P.3
-
8
-
-
84944403811
-
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
-
R. Kumar, K. I. Farkas, and N. Jouppi et al. Single-ISA Heterogeneous Multi-Core Architectures: the Potential for Processor Power Reduction. In Proc. of MICRO 36, 2003.
-
(2003)
Proc. of MICRO
, vol.36
-
-
Kumar, R.1
Farkas, K.I.2
Jouppi, N.3
-
9
-
-
77952281111
-
Towards Better Performance Per Watt in Virtual Environments on Asymmetric Single-ISA Multi-core Systems
-
V. Kumar and A. Fedorova. Towards Better Performance Per Watt in Virtual Environments on Asymmetric Single-ISA Multi-core Systems. ACM OSR, 43(3), 2009.
-
(2009)
ACM OSR
, vol.43
, Issue.3
-
-
Kumar, V.1
Fedorova, A.2
-
10
-
-
77952358595
-
Efficient Operating System Scheduling for Performance-Asymmetric Multi-Core Architectures
-
T. Li, D. Baumberger, and D. A. Koufaty et al. Efficient Operating System Scheduling for Performance-Asymmetric Multi-Core Architectures. In Proc. of SC '07.
-
Proc. of SC '07
-
-
Li, T.1
Baumberger, D.2
Koufaty, D.A.3
-
11
-
-
47249139474
-
Using Asymmetric Single-ISA CMPs to Save Energy on Operating Systems
-
J. C. Mogul, J. Mudigonda, N. Binkert, P. Ranganathan, and V. Talwar. Using Asymmetric Single-ISA CMPs to Save Energy on Operating Systems. IEEE Micro, 28(3):26-41, 2008.
-
(2008)
IEEE Micro
, vol.28
, Issue.3
, pp. 26-41
-
-
Mogul, J.C.1
Mudigonda, J.2
Binkert, N.3
Ranganathan, P.4
Talwar, V.5
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