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Volumn 9, Issue 1, 2014, Pages 281-295

Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approach

Author keywords

Embedded system for automotive; Performance analysis; System level design and hardware software co design

Indexed keywords

COMPUTER SIMULATION; DESIGN; EMBEDDED SYSTEMS; IMAGE COMMUNICATION SYSTEMS; IMAGE PROCESSING;

EID: 84897581431     PISSN: 18618200     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11554-013-0323-8     Document Type: Article
Times cited : (1)

References (29)
  • 3
    • 84897583190 scopus 로고    scopus 로고
    • CIFAER Project. http://www. insa-rennes. fr/ietr-cifaer (2012).
    • (2012) CIFAER Project
  • 4
    • 84884350348 scopus 로고    scopus 로고
    • CoFluent Design. http://www. cofluentdesign. com (2012).
    • (2012) CoFluent Design
  • 6
    • 84870601566 scopus 로고    scopus 로고
    • Mentor Graphics. http://www. mentor. com (2012).
    • (2012) Mentor Graphics
  • 8
    • 84897583614 scopus 로고    scopus 로고
    • Symtavision. http://www. symtavision. com (2012).
    • (2012) Symtavision
  • 10
    • 84861017883 scopus 로고    scopus 로고
    • A state-based modeling approach for efficient performance evaluation of embedded system architectures at transaction level
    • Barreteau, A., Le Nours, S., Pasquier, O.: A state-based modeling approach for efficient performance evaluation of embedded system architectures at transaction level. J. Electr. Comput. Eng. (2012).
    • (2012) J. Electr. Comput. Eng.
    • Barreteau, A.1    Le Nours, S.2    Pasquier, O.3
  • 18
    • 9644281035 scopus 로고    scopus 로고
    • Methods for evaluating and covering the design space during early design development
    • Gries, M.: Methods for evaluating and covering the design space during early design development. Integr. VLSI J. 38(2): 131-183 (2004).
    • (2004) Integr. VLSI J. , vol.38 , Issue.2 , pp. 131-183
    • Gries, M.1
  • 20
    • 49749126705 scopus 로고    scopus 로고
    • Combining UML2 application and SystemC platform modelling for performance evaluation of real-time embedded systems
    • Kreku, J., Hoppari M. K.: Combining UML2 application and SystemC platform modelling for performance evaluation of real-time embedded systems. EURASIP J. Embed. Syst. (2008).
    • (2008) EURASIP J. Embed. Syst.
    • Kreku, J.1    Hoppari, M.K.2
  • 21
    • 0000404969 scopus 로고    scopus 로고
    • A methodology for architecture exploration of heterogeneous signal processing systems
    • Lieverse, P., van Der Wolf, P., Vissers, K., Deprettere, E. F.: A methodology for architecture exploration of heterogeneous signal processing systems. J. VLSI Sign. Process. 29(3): 197-207 (2001).
    • (2001) J. VLSI Sign. Process. , vol.29 , Issue.3 , pp. 197-207
    • Lieverse, P.1    van der Wolf, P.2    Vissers, K.3    Deprettere, E.F.4
  • 24
    • 33744721815 scopus 로고    scopus 로고
    • A systematic approach to exploring embedded system architectures at multiple abstraction levels
    • Pimentel, A. D., Erbas, C., Polstra, S.: A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Trans. Comput. 55(2): 99-111 (2006).
    • (2006) IEEE Trans. Comput. , vol.55 , Issue.2 , pp. 99-111
    • Pimentel, A.D.1    Erbas, C.2    Polstra, S.3
  • 25
    • 34547824056 scopus 로고    scopus 로고
    • Quo vadis, SLD? Reasoning about the trends and challenges of system level design
    • Sangiovanni-Vincentelli, A.: Quo vadis, SLD? Reasoning about the trends and challenges of system level design. In: Proceedings of the IEEE (2007).
    • (2007) In: Proceedings of the IEEE
    • Sangiovanni-Vincentelli, A.1
  • 26
    • 67549107026 scopus 로고    scopus 로고
    • Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
    • Schirner, G., Dömer, R.: Quantitative analysis of the speed/accuracy trade-off in transaction level modeling. Trans. Embed. Comput. Syst. 8(1) (2008).
    • (2008) Trans. Embed. Comput. Syst. , vol.8 , Issue.1
    • Schirner, G.1    Dömer, R.2
  • 29
    • 33749010321 scopus 로고    scopus 로고
    • TAPES-trace-based architecture performance evaluation with SystemC
    • Wild, T., Herkersdorf, A., Lee, GY.: TAPES-trace-based architecture performance evaluation with SystemC. Des. Autom. Embed. Syst. 10(2-3): 157-179 (2006).
    • (2006) Des. Autom. Embed. Syst. , vol.10 , Issue.2-3 , pp. 157-179
    • Wild, T.1    Herkersdorf, A.2    Lee, G.Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.