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Volumn , Issue , 2012, Pages

A state-based modeling approach for efficient performance evaluation of embedded system architectures at transaction level

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE EXPLORATION; COMMUNICATION RECEIVERS; COMPUTATION METHODS; DESIGN SPACES; EMBEDDED SYSTEM ARCHITECTURES; EVALUATION PROCESS; EXECUTION MODEL; HARDWARE/SOFTWARE; LIGHT MODELING; MEMORY RESOURCES; MODELING APPROACH; PERFORMANCE EVALUATION; PHYSICAL LAYERS; RELIABLE MODELS; SIMULATION SPEED; SIMULATION SPEED-UP; STATE-BASED; SYSTEM ARCHITECTS; SYSTEM ARCHITECTURES; TRANSACTION LEVEL; TRANSACTION LEVEL MODELING; TRANSACTION LEVEL MODELS;

EID: 84861017883     PISSN: 20900147     EISSN: 20900155     Source Type: Journal    
DOI: 10.1155/2012/537327     Document Type: Article
Times cited : (5)

References (30)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.