-
1
-
-
0034870071
-
A low-leakage dynamic multi-ported register file in 0. 13um CMOS
-
Aug
-
A. Alvandpour, R. Krishnamurthy, K. Soumyanath, and S. Borkar. A low-leakage dynamic multi-ported register file in 0. 13um CMOS. In Proc. ISLPED 2001, pages 68-71, Aug. 2001.
-
(2001)
Proc. ISLPED
, vol.2001
, pp. 68-71
-
-
Alvandpour, A.1
Krishnamurthy, R.2
Soumyanath, K.3
Borkar, S.4
-
3
-
-
0033719421
-
Wattch: A framework for architectural-level power analysis and optimizations
-
June
-
D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A framework for architectural-level power analysis and optimizations. In Proc. ISCA-27, pages 83-94, June 2000.
-
(2000)
Proc. ISCA
, vol.27
, pp. 83-94
-
-
Brooks, D.1
Tiwari, V.2
Martonosi, M.3
-
4
-
-
0034427485
-
A static power model for architects
-
Dec
-
J. A. Butts and G. S. Sohi. A static power model for architects. In Proc. Micro-33, pages 191-201, Dec. 2000.
-
(2000)
Proc. Micro
, vol.33
, pp. 191-201
-
-
Butts, J.A.1
Sohi, G.S.2
-
5
-
-
0036949555
-
Tradeoffs in power-efficient issue queue design
-
Aug
-
A. Buyuktosunoglu, D. H. Albonesi, P. Bose, P. W. Cook, , and S. E. Schuster. Tradeoffs in power-efficient issue queue design. In Proc. ISLPED 2002, pages 184-189, Aug. 2002.
-
(2002)
Proc. ISLPED
, vol.2002
, pp. 184-189
-
-
Buyuktosunoglu, A.1
Albonesi, D.H.2
Bose, P.3
Cook, P.W.4
Schuster, S.E.5
-
6
-
-
79955970060
-
Managing static leakage energy in microprocessor functional units
-
Nov
-
S. Dropsho, V. Kursun, D. H. Albonesi, S. Dwarkadas, and E. G. Friedman. Managing static leakage energy in microprocessor functional units. In Proc. Micro-35, pages 321-32, Nov. 2002.
-
(2002)
Proc. Micro
, vol.35
, pp. 321-332
-
-
Dropsho, S.1
Kursun, V.2
Albonesi, D.H.3
Dwarkadas, S.4
Friedman, E.G.5
-
7
-
-
0036294454
-
Drowsy caches: Simple techniques for reducing leakage power
-
May
-
K. Flautner, N. S. Kim, S. Martin, D. Blaauw, and T. Mudge. Drowsy caches: Simple techniques for reducing leakage power. In Proc. ISCA-29, pages 147-57, May 2002.
-
(2002)
Proc. ISCA
, vol.29
, pp. 147-157
-
-
Flautner, K.1
Kim, N.S.2
Martin, S.3
Blaauw, D.4
Mudge, T.5
-
8
-
-
0000720570
-
Energy-effective issue logic
-
June
-
D. Folegnani and A. Gonzalez. Energy-effective issue logic. In Proc. ISCA-28, pages 248-59, June. 2001.
-
(2001)
Proc. ISCA
, vol.28
, pp. 248-259
-
-
Folegnani, D.1
Gonzalez, A.2
-
10
-
-
0035183730
-
Static energy reduction techniques for microprocessor caches
-
Sept
-
H. Hanson et al. Static energy reduction techniques for microprocessor caches. In Proc. ICCD 2001, pages 276-83, Sept. 2001.
-
(2001)
Proc. ICCD
, vol.2001
, pp. 276-283
-
-
Hanson, H.1
-
11
-
-
0036292678
-
Dynamic fine-grain leakage reduction using leakage-biased bitlines
-
May
-
S. Heo, K. Barr, M. Hampton, and K. Asanovic. Dynamic fine-grain leakage reduction using leakage-biased bitlines. In Proc. ISCA-29, pages 137-47, May 2002.
-
(2002)
Proc. ISCA
, vol.29
, pp. 137-147
-
-
Heo, S.1
Barr, K.2
Hampton, M.3
Asanovic, K.4
-
12
-
-
0036398350
-
Applying decay strategies to branch predictors for leakage energy savings
-
Sept
-
Z. Hu, P. Juang, K. Skadron, D. Clark, and M. Martonosi. Applying decay strategies to branch predictors for leakage energy savings. In Proc. ICCD 2002, pages 442-45, Sept. 2002.
-
(2002)
Proc. ICCD
, vol.2002
, pp. 442-445
-
-
Hu, Z.1
Juang, P.2
Skadron, K.3
Clark, D.4
Martonosi, M.5
-
13
-
-
0034856732
-
Cache decay: Exploiting generational behavior to reduce cache leakage power
-
July
-
S. Kaxiras, Z. Hu, and M. Martonosi. Cache decay: Exploiting generational behavior to reduce cache leakage power. In Proc. ISCA-28, pages 240-251, July 2001.
-
(2001)
Proc. ISCA
, vol.28
, pp. 240-251
-
-
Kaxiras, S.1
Hu, Z.2
Martonosi, M.3
-
14
-
-
0034878684
-
Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs
-
Aug
-
A. Keshavarzi et al. Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs. In Proc. ISLPED 2001, pages 207-12, Aug. 2001.
-
(2001)
Proc. ISLPED
, vol.2001
, pp. 207-212
-
-
Keshavarzi, A.1
-
15
-
-
0032297487
-
The alpha 21264 microprocessor architecture
-
Oct
-
R. E. Kessler, E. J. McLellan, and D. A. Webb. The Alpha 21264 microprocessor architecture. In Proc. ICCD 1998, pages 90-95, Oct. 1998.
-
(1998)
Proc. ICCD
, vol.1998
, pp. 90-95
-
-
Kessler, R.E.1
McLellan, E.J.2
Webb, D.A.3
-
16
-
-
0031618603
-
A low power sram using auto-backgatecontrolled mt-cmos
-
Aug
-
K. Nii et al. A low power SRAM using auto-backgatecontrolled MT-CMOS. In Proc. ISLPED 1998, pages 293-98, Aug. 1998.
-
(1998)
Proc. ISLPED
, vol.1998
, pp. 293-298
-
-
Nii, K.1
-
18
-
-
0033672408
-
Gated-vdd: A circuit technique to reduce leakage in deep-submicron cache memories
-
July
-
M. Powell, S.-H. Yang, B. Falsafi, K. Roy, and T. N. Vijaykumar. Gated-Vdd: A circuit technique to reduce leakage in deep-submicron cache memories. In Proc. ISLPED 2000, pages 90-95, July 2000.
-
(2000)
Proc. ISLPED
, vol.2000
, pp. 90-95
-
-
Powell, M.1
Yang, S.-H.2
Falsafi, B.3
Roy, K.4
Vijaykumar, T.N.5
-
20
-
-
0347894347
-
Adaptive cache decay using formal feedback control
-
May
-
S. Velusamy, K. Sankaranarayanan, D. Parikh, T. Abdelzaher, and K. Skadron. Adaptive cache decay using formal feedback control. In Proc. WMPI-2, May 2002.
-
(2002)
Proc. WMPI
, vol.2
-
-
Velusamy, S.1
Sankaranarayanan, K.2
Parikh, D.3
Abdelzaher, T.4
Skadron, K.5
-
21
-
-
67650300737
-
Hotleakage: A temperature-Aware model of subthreshold and gate leakage for architects
-
Mar
-
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. Hotleakage: A temperature-Aware model of subthreshold and gate leakage for architects. Technical Report CS-2003-05, U. Va. Dept. of Computer Science, Mar. 2003.
-
(2003)
Technical Report CS-2003-05, U. Va. Dept. of Computer Science
-
-
Zhang, Y.1
Parikh, D.2
Sankaranarayanan, K.3
Skadron, K.4
Stan, M.5
-
22
-
-
0035177403
-
Adaptive mode control: A static-power-efficient cache design
-
Sept
-
H. Zhou, M. Toburen, E. Rotenberg, and T. Conte. Adaptive mode control: A static-power-efficient cache design. In Proc. PACT 2001, Sept. 2001.
-
(2001)
Proc. PACT
, vol.2001
-
-
Zhou, H.1
Toburen, M.2
Rotenberg, E.3
Conte, T.4
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