Applying decay strategies to branch predictors for leakage energy savings

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2002, Pages 442-445

  Hu, Zhigang ^a   Juang, Philo ^a   Skadron, Kevin ^a   Clark, Douglas ^a   Martonosi, Margaret ^a  

^a PRINCETON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; LEAKAGE CURRENTS; SIGNAL FILTERING AND PREDICTION; THRESHOLD VOLTAGE;

APPLICATION PROGRAMMERS; BRANCH PREDICTORS;

BUFFER STORAGE;

EID: 0036398350     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)

1. S. Borkar. Design challenges of technology scaling. IEEE Micro, 19(4), 1999.
2. D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A Framework for Architecture-Level Power Analysis and Optimizations. In Proc. ISCA-27, ISCA 2000.
3. D. C. Burger and T. M. Austin. The SimpleScalar tool set, version 2.0. Computer Architecture News, 25(3):13-25, June 1997.
4. P.-Y. Chang, E. Hao, and Y. N. Patt. Alternative implementations of hybrid branch predictors. In Proc. Micro-28, pages 252-57, Dec. 1995.
5. K. Diefendorff. Pentium III = Pentium II + SSE. Microprocessor Report, Mar. 8 1999.
6. L. Gwennap. Digital 21264 sets new standard. Microprocessor Report, pages 11-16, Oct. 28, 1996.
7. Z. Hu, P. Juang, K. Skadron, D. Clark, and M. Martonosi. Applying decay strategies to branch predictors for leakage energy savings. Tech. Report CS-2001-24, Univ. of Virginia.
8. J. A. Butts and G. Sohi. A Static Power Model for Architects. In Proc. Micro-33, Dec. 2000.
9. D. A. Jiménez, S. W. Keckler, and C. Lin. The impact of delay on the design of branch predictors. In Proc. Micro-33, pages 67-77, Dec. 2000.
10. S. Kaxiras, Z. Hu, and M. Martonosi. Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power. In Proc. ISCA-28, July 2001.
11. A. Lai, C. Fide, and B. Falsafi. Dead-Block Prediction and Dead-Block Correlating Prefetchers. In Proc. ISCA-28, July 2001.
12. M. Lipasti, C. B. Wilkerson, and J. P. Shen. Value locality and load value prediction. In Proc. ASPLOS-VII, pages 138-47, Oct. 1996.
13. S. McFarling. Combining branch predictors. Tech. Note TN-36, DEC WRL, June 1993.
14. D. Parikh, K. Skadron, Y. Zhang, M. Barcella, and M. Stan. Power issues related to branch prediction. In Proc. HPCA-8, pages 233-44, Feb. 2002.
15. K. Skadron, T. Abdelzaher, and M. R. Stan. Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management. In Proc. HPCA-8, pages 17-28, Feb. 2002.
16. J. E. Smith. A study of branch prediction strategies. In Proc. ISCA-8, pages 135-48, May 1981.
17. P. Song. UltraSparc-3 aims at MP servers. Microprocessor Report, pages 29-34, Oct. 27 1997.
18. The Standard Performance Evaluation Corporation. WWWW Site. http://www.spec.org, Dec. 2000.
19. S.-H. Yang et al. An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches. In Proc. HPCA-7, 2001.