A 40 nm, 454MHz 114 fJ/bit area-efficient SRAM memory with integrated charge pump

European Solid-State Circuits Conference

Volumn , Issue , 2013, Pages 201-204

  Rooseleer, Bram ^a   Dehaene, Wim ^a,b  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE ENERGY; AREA-EFFICIENT; DEEP SUB-MICRON TECHNOLOGY; INTEGRATED CHARGE PUMPS; LOW STANDBY POWER TECHNOLOGIES; NOVEL TECHNIQUES; RETENTION MODES; ULTRA-LOW POWER;

STATIC RANDOM ACCESS STORAGE;

EID: 84891138622     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2013.6649107     Document Type: Conference Paper

References (11)

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