NOT and NOR logic circuits using passivation dielectric involved dual gate in a-InGaZnO TFTs

IEEE Electron Device Letters

Volumn 34, Issue 12, 2013, Pages 1527-1529

  Nam, Seung Hee ^a   Jeon, Pyo Jin ^b   Lee, Young Tack ^b   Raza, Syed Raza Ali ^b   Im, Seongil ^b  

^a LG Display Co Ltd   (South Korea)

^b Yonsei University   (South Korea)

Author keywords

Amorphous InGaZnO; dual gate TFT; logic circuit; thin film transistor

Indexed keywords

AMORPHOUS INGAZNO; DUAL-GATE TFT; INDEPENDENT CONTROL; PASSIVATION LAYER; SUBTHRESHOLD SWING; THIN-FILM TRANSISTOR (TFTS); THRESHOLD BEHAVIOR; TRANSITION VOLTAGE;

GAIN MEASUREMENT; GATE DIELECTRICS; LOGIC CIRCUITS; PASSIVATION; SEMICONDUCTING ORGANIC COMPOUNDS;

THIN FILM TRANSISTORS;

EID: 84889592043     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2013.2285185     Document Type: Article

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