III-V on silicon for future high speed and ultra-low power digital applications: Challenges and opportunities

2008 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2008

Volumn , Issue , 2008, Pages

  Chau, Robert ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Digital logic; High speed; III V on silicon; Quantum well transistors; Ultra low power

Indexed keywords

BUFFER ARCHITECTURE; DIGITAL APPLICATIONS; DIGITAL LOGIC; DIGITAL LOGIC APPLICATIONS; HETEROGENEOUS INTEGRATION; HIGH SPEED; LOW SUPPLY VOLTAGES; ULTRA-LOW POWER;

SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR QUANTUM WELLS;

SILICON;

EID: 84887496795     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

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