A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customization

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2013, Pages 659-664

  Xydis, Sotirios ^a   Palermo, Gianluca ^a   Zaccaria, Vittorio ^a   Silvano, Cristina ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; COPROCESSOR; ITERATIVE METHODS; MOTION PICTURE EXPERTS GROUP STANDARDS; PARETO PRINCIPLE; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEM-ON-CHIP;

ARCHITECTURAL SYNTHESIS; CO-PROCESSOR ARCHITECTURE; DESIGN SPACE EXPLORATION; EFFICIENT IMPLEMENTATION; EXPLORATION STRATEGIES; HETEROGENEOUS SYSTEMS; PARETO-OPTIMAL DESIGN; RESPONSE SURFACE MODELS;

INTEGRATED CIRCUIT DESIGN;

EID: 84885578864     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2013.143     Document Type: Conference Paper

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