Towards the integration of carbon nanotubes as vias in monolithic three-dimensional integrated circuits

Japanese Journal of Applied Physics

Volumn 52, Issue 4 PART 2, 2013, Pages

  Vollebregt, Sten ^a   Chiaramonti, Ann N ^b   Van Der Cingel, Johan ^a   Beenakker, Kees ^a   Ishihara, Ryoichi ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOTTOM UP APPROACH; ELECTRICAL PERFORMANCE; SINGLE-GRAIN THIN-FILM TRANSISTOR; THERMAL AND ELECTRICAL PROPERTIES; THREE DIMENSIONAL INTEGRATED CIRCUITS; TOP-DOWN PROCESS; TOPDOWN;

CARBON NANOTUBES; INTEGRATED CIRCUITS; SOLID STATE DEVICES; THREE DIMENSIONAL;

ELECTRIC PROPERTIES;

EID: 84880776273     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.7567/JJAP.52.04CB02     Document Type: Conference Paper

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