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Volumn , Issue , 2013, Pages

Rapid exploration of processing and design guidelines to overcome carbon nanotube variations

Author keywords

Carbon nanotube; Carbon nanotube Variations; Delay optimization; Noise margin optimization

Indexed keywords

AD-HOC TECHNIQUES; CARBON NANOTUBE FIELD-EFFECT TRANSISTORS; DELAY OPTIMIZATION; ENERGY EFFICIENT; NOISE MARGINS; PROCESSING PARAMETERS; SYSTEMATIC FRAMEWORK; TECHNOLOGY NODES;

EID: 84879871813     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2463209.2488864     Document Type: Conference Paper
Times cited : (12)

References (43)
  • 1
    • 39549093276 scopus 로고    scopus 로고
    • Carbon nanotubes for highperformance electronics-progress and prospect
    • Appenzeller 08, 96.2
    • [Appenzeller 08] Appenzeller, J., "Carbon nanotubes for highperformance electronics-Progress and prospect, " Proc. IEEE, Vol. 96.2, pp. 201-211, 2008.
    • (2008) Proc. IEEE , pp. 201-211
    • Appenzeller, J.1
  • 2
    • 33846116009 scopus 로고    scopus 로고
    • Sorting carbon nanotubes by electronic structure using density differentiation
    • Arnold 06
    • [Arnold 06] Arnold, M. S., et al., "Sorting carbon nanotubes by electronic structure using density differentiation, " Nature Nanotech., Vol. 1,1, pp. 60-65, 2006.
    • (2006) Nature Nanotech , vol.1 , Issue.1 , pp. 60-65
    • Arnold, M.S.1
  • 3
    • 0037976260 scopus 로고
    • Dykstra's alternating projection algorithm for two sets
    • Bauschke 94
    • [Bauschke 94] Bauschke, H. H., and Borwein, J. M., "Dykstra's alternating projection algorithm for two sets, " Journal of Approximation Theory, Vol. 79, 3, pp. 418-443, 1994.
    • (1994) Journal of Approximation Theory , vol.79 , Issue.3 , pp. 418-443
    • Bauschke, H.H.1    Borwein, J.M.2
  • 4
    • 84864227242 scopus 로고    scopus 로고
    • Evaluation of field-effect mobility and contact resistance of transistors that use solution-processed single-walled carbon nanotubes
    • Cao 12
    • [Cao 12] Cao, Q., et al., "Evaluation of Field-Effect Mobility and Contact Resistance of Transistors That Use Solution-Processed Single-Walled Carbon Nanotubes, " ACS nano, Vol. 6-7, pp. 6471-6477, 2012.
    • (2012) ACS Nano , vol.6-7 , pp. 6471-6477
    • Cao, Q.1
  • 5
    • 84879848114 scopus 로고    scopus 로고
    • IEDM short course
    • Chang 12
    • [Chang 12] Chang, L., et al., "IEDM Short Course, " IEDM, 2012.
    • (2012) IEDM
    • Chang, L.1
  • 6
    • 84879864405 scopus 로고    scopus 로고
    • Flute: Fast lookup table based wirelength estimation technique
    • Chu 04
    • [Chu 04] Chu, C., "FLUTE: fast lookup table based wirelength estimation technique, " ICCAD, Vol. 27, 1, pp. 70-83, 2004.
    • (2004) ICCAD , vol.27 , Issue.1 , pp. 70-83
    • Chu, C.1
  • 7
    • 84863331671 scopus 로고    scopus 로고
    • Carbon nanotube based ultra-low voltage integrated circuits: Scaling down to 0.4 V
    • Ding 12
    • [Ding 12] Ding, L., et al., "Carbon Nanotube Based Ultra-Low Voltage Integrated Circuits: Scaling Down to 0.4 V, " Applied Physics Letters, Vol. 100, pp. 2631161 - 2631165, 2012.
    • (2012) Applied Physics Letters , vol.100 , pp. 2631161-2631165
    • Ding, L.1
  • 8
    • 84879867613 scopus 로고    scopus 로고
    • [Eigen] http://eigen.tuxfamily.org.
    • Eigen
  • 9
    • 84856969577 scopus 로고    scopus 로고
    • Sub-10 nm carbon nanotube transistor
    • Franklin 12a
    • [Franklin 12a] Franklin, A. D., et al., "Sub-10 nm Carbon nanotube transistor, " Nano letters, Vol. 12, 2, pp. 758-762, 2012.
    • (2012) Nano Letters , vol.12 , Issue.2 , pp. 758-762
    • Franklin, A.D.1
  • 10
    • 84876112367 scopus 로고    scopus 로고
    • Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-around
    • Franklin 12b
    • [Franklin 12b] Franklin, A., et al., "Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-around, " IEDM, pp. 4-5, 2012.
    • (2012) IEDM , pp. 4-5
    • Franklin, A.1
  • 11
    • 84863230306 scopus 로고    scopus 로고
    • Variability in carbon nanotube transistors: Improving device-to-device consistency
    • Franklin 12c
    • [Franklin 12c] Franklin, A. D., et al., "Variability in Carbon Nanotube Transistors: Improving Device-to-Device Consistency, " ACS nano, Vol. 6, 2, pp. 1109-1115, 2012.
    • (2012) ACS Nano , vol.6 , Issue.2 , pp. 1109-1115
    • Franklin, A.D.1
  • 13
    • 34248360702 scopus 로고    scopus 로고
    • High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes
    • Kang 07
    • [Kang 07] Kang, S. J., et al., "High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes, " Nature Nanotech., Vol. 2, 4, pp. 230-236, 2007.
    • (2007) Nature Nanotech , vol.2 , Issue.4 , pp. 230-236
    • Kang, S.J.1
  • 14
    • 84866914180 scopus 로고    scopus 로고
    • Reliable minimum energy cmos circuit design
    • Keller 11
    • [Keller 11] Keller, S., et al., "Reliable Minimum Energy CMOS Circuit Design, " European Workshop on CMOS Variability, 2011.
    • (2011) European Workshop on CMOS Variability
    • Keller, S.1
  • 15
    • 33750050005 scopus 로고    scopus 로고
    • Performance/watt: The new server focus
    • Laudon 05
    • [Laudon 05] Laudon, J., "Performance/watt: the new server focus, " ACM SIGARCH Computer Architecture News, Vol. 33, 4, pp. 5-13, 2005.
    • (2005) ACM SIGARCH Computer Architecture News , vol.33 , Issue.4 , pp. 5-13
    • Laudon, J.1
  • 16
    • 84859891508 scopus 로고    scopus 로고
    • ACCNT-A metallic-CNT-tolerant design methodology for carbon-nanotube VLSI: Concepts and experimental demonstration
    • Lin 09
    • [Lin 09] Lin, A., et al., "ACCNT-A metallic-CNT-tolerant design methodology for carbon-nanotube VLSI: Concepts and experimental demonstration, " IEEE Trans. Electron Devices, Vol. 56, 12, pp. 2969- 2978, 2009.
    • (2009) IEEE Trans. Electron Devices , vol.56 , Issue.12 , pp. 2969-2978
    • Lin, A.1
  • 17
    • 0020906578 scopus 로고
    • Worst-case static noise margin criteria for logic circuits and their mathematical equivalence
    • Lohstroh 83
    • [Lohstroh 83] Lohstroh, J., et al., "Worst-case static noise margin criteria for logic circuits and their mathematical equivalence, " IEEE Journal of Solid-State Circuits, Vol. 18, 6, pp. 803-807, 1983.
    • (1983) IEEE Journal of Solid-State Circuits , vol.18 , Issue.6 , pp. 803-807
    • Lohstroh, J.1
  • 18
    • 3843068759 scopus 로고    scopus 로고
    • Methods for true energy-performance optimization
    • Markovic 04
    • [Markovic 04] Markovic, D., et al., "Methods for true energy-performance optimization, " IEEE Journal of Solid-State Circuits, Vol. 39, 8, pp. 1282-1293, 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.39 , Issue.8 , pp. 1282-1293
    • Markovic, D.1
  • 19
    • 84879864985 scopus 로고    scopus 로고
    • [Nangate] http://www.nangate.com.
    • Nangate
  • 20
    • 48649091785 scopus 로고    scopus 로고
    • High performance CMOS variability in the 65nm regime and beyond
    • Nassif 07
    • [Nassif 07] Nassif, S., et al. "High performance CMOS variability in the 65nm regime and beyond, " IEDM, pp. 569-571, 2007.
    • (2007) IEDM , pp. 569-571
    • Nassif, S.1
  • 21
    • 84879878399 scopus 로고    scopus 로고
    • [OpenSparc] http://www.opensparc.net/opensparc-t2.
    • OpenSparc
  • 22
    • 84873877390 scopus 로고    scopus 로고
    • High-density integration of carbon nanotubes via chemical self-assembly
    • Park 12
    • [Park 12] Park, H., et al., "High-density integration of carbon nanotubes via chemical self-assembly, " Nature Nanotech., Vol. 7, 12, pp. 787-791, 2012.
    • (2012) Nature Nanotech , vol.7 , Issue.12 , pp. 787-791
    • Park, H.1
  • 23
    • 52649150836 scopus 로고    scopus 로고
    • Design methods for misaligned and mispositioned carbon-nanotube immune circuits
    • Patil 08
    • [Patil 08] Patil, N., et al., "Design methods for misaligned and mispositioned carbon-nanotube immune circuits, " IEEE Trans. CAD, Vol. 27, 10, pp. 1725-1736, 2008.
    • (2008) IEEE Trans. CAD , vol.27 , Issue.10 , pp. 1725-1736
    • Patil, N.1
  • 24
    • 67949117067 scopus 로고    scopus 로고
    • Wafer-scale growth and transfer of aligned single-walled carbon nanotubes
    • Patil 09a
    • [Patil 09a] Patil, N., et al., "Wafer-scale growth and transfer of aligned single-walled carbon nanotubes, " IEEE Trans. Nanotech., Vol. 8, 4, pp. 498-504, 2009.
    • (2009) IEEE Trans. Nanotech. , vol.8 , Issue.4 , pp. 498-504
    • Patil, N.1
  • 25
    • 77952326542 scopus 로고    scopus 로고
    • VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using carbon nanotube fets
    • Patil 09b
    • [Patil 09b] Patil, N., et al., "VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using carbon nanotube FETs, " IEDM, pp. 1-4, 2009.
    • (2009) IEDM , pp. 1-4
    • Patil, N.1
  • 26
    • 79960281144 scopus 로고    scopus 로고
    • Scalable carbon nanotube computational and storage circuits immune to metallic and mispositioned carbon nanotubes
    • Patil 11
    • [Patil 11] Patil, N., et al. "Scalable carbon nanotube computational and storage circuits immune to metallic and mispositioned carbon nanotubes, " IEEE Trans. Nanotech., Vol. 10, 4, pp. 744-750, 2011.
    • (2011) IEEE Trans. Nanotech. , vol.10 , Issue.4 , pp. 744-750
    • Patil, N.1
  • 27
    • 41749091851 scopus 로고    scopus 로고
    • Impact of a process variation on nanowire and nanotube device performance
    • Paul 07
    • [Paul 07] Paul, B. C., et al. "Impact of a process variation on nanowire and nanotube device performance, " IEEE Trans. Electron Devices, Vol. 54, 9, pp. 2369-2376, 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.9 , pp. 2369-2376
    • Paul, B.C.1
  • 28
    • 62749140771 scopus 로고    scopus 로고
    • Variation tolerance in a multichannel carbon-nanotube transistor for high-speed digital circuits
    • Raychowdhury 09
    • [Raychowdhury 09] Raychowdhury, A., et al., "Variation tolerance in a multichannel carbon-nanotube transistor for high-speed digital circuits, " IEEE Trans. Electron Devices, Vol. 56, 3, pp. 383-392, 2009.
    • (2009) IEEE Trans. Electron Devices , vol.56 , Issue.3 , pp. 383-392
    • Raychowdhury, A.1
  • 30
    • 44149126004 scopus 로고    scopus 로고
    • High-performance routing at the nanometer scale
    • Roy 08
    • [Roy 08] Roy, J. A., and Markov, I. L., "High-performance routing at the nanometer scale, " IEEE Trans. CAD, Vol. 27, 6, pp. 1066-1077, 2008.
    • (2008) IEEE Trans. CAD , vol.27 , Issue.6 , pp. 1066-1077
    • Roy, J.A.1    Markov, I.L.2
  • 31
    • 79955892163 scopus 로고    scopus 로고
    • Linear increases in carbon nanotube density through multiple transfer technique
    • Shulaker 11
    • [Shulaker 11] Shulaker, M. M., et al., "Linear increases in carbon nanotube density through multiple transfer technique, " Nano letters, Vol. 11, 5, pp. 1881-1886, 2011.
    • (2011) Nano Letters , vol.11 , Issue.5 , pp. 1881-1886
    • Shulaker, M.M.1
  • 32
    • 84876589560 scopus 로고    scopus 로고
    • Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon nanotube fets
    • Shulaker 13
    • [Shulaker 13] Shulaker, M. M., et al., "Experimental Demonstration of a Fully Digital Capacitive Sensor Interface Built Entirely Using Carbon Nanotube FETs, " ISSCC, pp. 112-113, 2013.
    • (2013) ISSCC , pp. 112-113
    • Shulaker, M.M.1
  • 33
    • 84879863065 scopus 로고    scopus 로고
    • [SPICE] http://nano.stanford.edu/models.php.
    • SPICE
  • 34
    • 77952396211 scopus 로고    scopus 로고
    • A non-iterative compact model for carbon nanotube FETS incorporating source exhaustion effects
    • Wei 09
    • [Wei 09] Wei, L., et al., "A non-iterative compact model for carbon nanotube FETs incorporating source exhaustion effects, " IEDM, pp. 1- 4, 2009.
    • (2009) IEDM , pp. 1-4
    • Wei, L.1
  • 35
    • 77957887100 scopus 로고    scopus 로고
    • Efficient metallic carbon nanotube removal readily scalable to wafer-level VLSI CNFET circuits
    • Wei 10
    • [Wei 10] Wei, H., et al., "Efficient Metallic Carbon Nanotube Removal Readily Scalable to Wafer-Level VLSI CNFET Circuits, " Proc. Symp. VLSI Tech., pp. 237-238, 2010.
    • (2010) Proc. Symp. VLSI Tech. , pp. 237-238
    • Wei, H.1
  • 38
    • 70350727154 scopus 로고    scopus 로고
    • Carbon nanotube circuits in the presence of carbon nanotube density variations
    • Zhang 09a
    • [Zhang 09a] Zhang, J., et al., "Carbon Nanotube Circuits in the Presence of Carbon Nanotube Density Variations, " DAC, pp. 71-76, 2009.
    • (2009) DAC , pp. 71-76
    • Zhang, J.1
  • 39
    • 77955197950 scopus 로고    scopus 로고
    • Probabilistic analysis and design of metallic-carbon-nanotube-tolerant digital logic circuits
    • Zhang 09b
    • [Zhang 09b] Zhang, J., et al., "Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits, " IEEE Trans. CAD, pp. 1307-1320, 2009.
    • (2009) IEEE Trans. CAD , pp. 1307-1320
    • Zhang, J.1
  • 40
    • 77956206855 scopus 로고    scopus 로고
    • Carbon nanotube correlation: Promising opportunity for CNFET circuit yield enhancement
    • Zhang 10
    • [Zhang 10] Zhang, J., et al., "Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement, " DAC, pp. 889-892, 2010.
    • (2010) DAC , pp. 889-892
    • Zhang, J.1
  • 41
    • 84863080094 scopus 로고    scopus 로고
    • Overcoming carbon nanotube variations through co-optimized technology and circuit design
    • Zhang 11a
    • [Zhang 11a] Zhang, J., et al., "Overcoming carbon nanotube variations through co-optimized technology and circuit design, " IEDM, pp. 4-6, 2011.
    • (2011) IEDM , pp. 4-6
    • Zhang, J.1
  • 43
    • 84859048309 scopus 로고    scopus 로고
    • Carbon nanotube robust digital VLSI
    • Zhang 12
    • [Zhang 12] Zhang, J., et al., "Carbon Nanotube Robust Digital VLSI, " IEEE Trans. CAD, Vol. 31, 4, pp. 453-471, 2012.
    • (2012) IEEE Trans. CAD , vol.31 , Issue.4 , pp. 453-471
    • Zhang, J.1


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