Two-step electrical degradation behavior in α-InGaZnO thin-film transistor under gate-bias stress

IEEE Electron Device Letters

Volumn 34, Issue 5, 2013, Pages 635-637

  Chen, Fa Hsyang ^a   Pan, Tung Ming ^a   Chen, Ching Hung ^a   Liu, Jiang Hung ^a   Lin, Wu Hsiung ^b   Chen, Po Hsueh ^b  

^a CHANG GUNG UNIVERSITY   (Taiwan)

^b AU Optronics ^*  (Taiwan)

Author keywords

Amorphous indium gallium zinc oxide ( IGZO); gate bias stress; reliability; thin film transistor (TFT); two step degradation

Indexed keywords

C. THIN FILM TRANSISTOR (TFT); DEGRADATION BEHAVIOR; ELECTRICAL DEGRADATION; GATE-BIAS STRESS; INDIUM-GALLIUM-ZINC OXIDES; PASSIVATION LAYER; THRESHOLD-VOLTAGE INSTABILITIES; TRANSFER CHARACTERISTICS;

ELECTRIC FIELDS; GALLIUM; GATE DIELECTRICS; INDIUM; MOLECULES; RELIABILITY; THRESHOLD VOLTAGE; ZINC OXIDE;

THIN FILM TRANSISTORS;

EID: 84876965127     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2013.2248115     Document Type: Article

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