Highly compact 1T-1R architecture (4F2 footprint) involving fully CMOS compatible vertical GAA nano-pillar transistors and oxide-based RRAM cells exhibiting excellent NVM properties and ultra-low power operation

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

  Wang, X P ^a   Fang, Z ^a   Li, X ^a   Chen, B ^b   Gao, B ^b   Kang, J F ^b   Chen, Z X ^a   Kamath, A ^a   Shen, N S ^a   Singh, N ^a   Lo, G Q ^a   Kwong, D L ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b PEKING UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS COMPATIBLE; CMOS-COMPATIBLE TECHNOLOGY; FAST SWITCHING; GATE-ALL-AROUND; NON-VOLATILE MEMORY; SWITCHING CURRENTS; SWITCHING PROPERTIES; ULTRA-LOW POWER;

ARCHITECTURE; CELLS; DATA STORAGE EQUIPMENT; ELECTRON DEVICES; GALLIUM ALLOYS;

CYTOLOGY;

EID: 84876157976     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6479082     Document Type: Conference Paper

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