Performance breakthrough in 8 nm gate length gate-all-around nanowire transistors using metallic nanowire contacts

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2008, Pages 34-35

  Jiang, Y ^a,b   Liow, T Y ^a,b   Singh, N ^a   Tan, L H ^a   Lo, G Q ^a   Chan, D S H ^b   Kwong, D L ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC WIRE; GALLIUM ALLOYS; NANOSTRUCTURED MATERIALS; NANOWIRES; TECHNOLOGY;

DOPANT PROFILING; DRIVE CURRENTS; GA TE LENGTHS; GATE-ALL-AROUND; LOW RESISTIVITY; NANO-WIRE TRANSISTORS; NANOWIRE DEVICES; PARASITIC RESISTANCES; S/D EXTENSION; SUCCESSFUL INTEGRATION; VLSI TECHNOLOGIES;

NANOSTRUCTURES;

EID: 51949101127     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2008.4588553     Document Type: Conference Paper

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