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Volumn , Issue , 2012, Pages

InAs-Si heterojunction nanowire tunnel diodes and tunnel FETs

Author keywords

[No Author keywords available]

Indexed keywords

GATE-ALL-AROUND; HIGH CURRENTS; HIGH-K DIELECTRIC; INVERSE SUBTHRESHOLD SLOPES; MATERIAL SYSTEMS; REVERSE BIAS; TOP CONTACT; VERTICAL TUNNEL DIODES;

EID: 84876097425     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6479056     Document Type: Conference Paper
Times cited : (32)

References (21)
  • 2
    • 78649987428 scopus 로고    scopus 로고
    • Device and architecture outlook for beyond cmos switches
    • K. Bernstein, R. K. Cavin, W. Porod, A. Seabaugh, J. Welser, "Device and Architecture Outlook for Beyond CMOS Switches," Proc. IEEE, vol. 98, pp. 2169-2184 2010.
    • (2010) Proc IEEE , vol.98 , pp. 2169-2184
    • Bernstein, K.1    Cavin, R.K.2    Porod, W.3    Seabaugh, A.4    Welser, J.5
  • 7
    • 84876090243 scopus 로고    scopus 로고
    • Sentaurus-Device User Guide Version
    • Synopsys Inc., Sentaurus-Device User Guide, Version 2011.09, 2011.
    • (2011) Synopsys Inc , vol.9 , pp. 2011
  • 8
    • 80054049436 scopus 로고    scopus 로고
    • Trap-assisted tunneling in Si-InAs nanowire heterojunction tunnel diodes
    • C. D. Bessire, M. T. Björk, H. Schmid, A. Schenk, K. B. Reuter, H. Riel, "Trap-Assisted Tunneling in Si-InAs Nanowire Heterojunction Tunnel Diodes," Nano Letters, vol. 11, pp. 4195-4199, 2011.
    • (2011) Nano Letters , vol.11 , pp. 4195-4199
    • Bessire, C.D.1    Björk, M.T.2    Schmid, H.3    Schenk, A.4    Reuter, K.B.5    Riel, H.6
  • 11
    • 84861686420 scopus 로고    scopus 로고
    • G. Dewey et al. IEEE IEDM, 11-785, p. 33.6.1, 2011.
    • (2011) IEEE IEDM , vol.11 , Issue.785 , pp. 3361
    • Dewey, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.