Making data prefetch smarter: Adaptive prefetching on power 7

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2012, Pages 137-146

  Jiménez, Víctor ^a   Gioiosa, Roberto ^b   Cazorla, Francisco J ^c   Buyuktosunoglu, Alper ^d   Bose, Pradip ^d   O'Connell, Francis P ^e  

^a BARCELONA SUPERCOMPUTING CENTER   (Spain)

^b PACIFIC NORTHWEST NATIONAL LABORATORY   (United States)

^c CSIC   (Spain)

^d IBM T J WATSON RESEARCH CENTER   (United States)

^e IBM   (United States)

Author keywords

Adaptive system; Performance; Prefetching

Indexed keywords

BUS BANDWIDTH; CACHE POLLUTION; DYNAMIC RE-CONFIGURATION; FIXED MODES; GENERAL PURPOSE; INTEGRAL PART; PERFORMANCE; PREFETCH ENGINE; PREFETCH MECHANISM; PREFETCHES; PREFETCHING; SINGLE-THREADED;

ADAPTIVE SYSTEMS; DYNAMIC MODELS;

PARALLEL ARCHITECTURES;

EID: 84867511610     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2370816.2370837     Document Type: Conference Paper

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