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Volumn 2006, Issue , 2006, Pages 239-250

Learning-based SMT processor resource distribution via hill-climbing

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE THREADS; INSTRUCTION OCCUPANCY; SHARED RESOURCES; SIMULTANEOUS MULTITHREADED (SMT);

EID: 33845901233     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2006.25     Document Type: Conference Paper
Times cited : (89)

References (20)
  • 6
    • 33845903923 scopus 로고    scopus 로고
    • http://www.intel.com/design/Pentium4/index.htm. Intel Pentium 4 Processor. 2002.
    • (2002)
  • 7
    • 3042669130 scopus 로고    scopus 로고
    • IBM Power5 chip: A dual-core multithreaded processor
    • R. N. Kalla, B. Sinharoy, and J. M. Tendler. IBM Power5 Chip: A Dual-Core Multithreaded Processor. IEEE Micro, 24(2):40-47, 2004.
    • (2004) IEEE Micro , vol.24 , Issue.2 , pp. 40-47
    • Kalla, R.N.1    Sinharoy, B.2    Tendler, J.M.3
  • 12
    • 84878636152 scopus 로고    scopus 로고
    • A study of a simultaneous multithreaded processor implementation
    • Toulouse, France, August. Springer-Verlag
    • D. Madon, E. Sanchez, and S. Monnier. A Study of a Simultaneous Multithreaded Processor Implementation. In Proceedings of EuroPar '99, pages 716-726, Toulouse, France, August 1999. Springer-Verlag.
    • (1999) Proceedings of EuroPar '99 , pp. 716-726
    • Madon, D.1    Sanchez, E.2    Monnier, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.