Detecting data hazards in multi-processor system-on-chips on FPGA

Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012

Volumn , Issue , 2012, Pages 282-287

  Wang, Chao ^a   Li, Xi ^a   Chen, Peng ^a   Feng, Xiaojing ^a   Zhang, Junneng ^a   Zhou, Xuehai ^a  

^a UNIVERSITY OF SCIENCE AND TECHNOLOGY OF CHINA   (China)

Author keywords

data hazard; out of order execution; scoreboarding; task level parallelism

Indexed keywords

COMPUTING RESOURCE; DATA DEPENDENCE; DATA DEPENDENCIES; DATA HAZARDS; FPGA BOARDS; INSTRUCTION-LEVEL; IP CORE; MULTI-PROCESSORS; OUT OF ORDER; OUT-OF-ORDER EXECUTION; PROTOTYPE SYSTEM; SCOREBOARDING; SYSTEM ON CHIPS; TASK EXECUTIONS; TASK LEVEL PARALLELISMS;

DISTRIBUTED PARAMETER NETWORKS; HAZARDS;

RECONFIGURABLE HARDWARE;

EID: 84867432117     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPSW.2012.33     Document Type: Conference Paper

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