A multilevel computing architecture for embedded multimedia applications

IEEE Micro

Volumn 24, Issue 3, 2004, Pages 56-66

  Karim, Faraydon ^a   Mellan, Alain ^a   Nguyen, Anh ^a   Aydonat, Utku ^b   Abdelrahman, Tarek ^b  

^a STMicroelectronics USA   (United States)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER PROGRAM LISTINGS; COMPUTER SIMULATION; DATA PROCESSING; DATA STRUCTURES; DECODING; EMBEDDED SYSTEMS; MATHEMATICAL MODELS; MULTIMEDIA SYSTEMS; MULTIPROCESSING SYSTEMS; PROGRAM COMPILERS;

MULTILEVEL COMPUTER ARCHITECTURE; PROGRAMMABLE SYSTEM ON A CHIP; PROGRAMMING MODEL; TASK EXECUTION;

MULTIPROGRAMMING;

EID: 3242784184     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2004.1     Document Type: Article

References (7)

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3. S. Muchnick, Advanced Compiler Design and Implementation, Morgan Kaufmann, 1997.
4. P. Tu, Automatic Array Privatization and Demand Driven Symbolic Analysis, doctoral dissertation, Dept. Computer Science, Univ. of Illinois at Urbana-Champaign, 1995.
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7. F. Karim et al., "The Hyperprocessor: A Template System-on-Chip Architecture for Embedded Multimedia Applications," Proc. 2nd Workshop Application-Specific Processors (WASP 03), 2003, pp. 66-73.