Microstructure and stress characterization around TSV using in-situ PIT-in-SEM

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2012, Pages 781-786

  Lee, Gyujei ^a,b   Choi, Min Jae ^a   Jeon, Suk Woo ^a   Byun, Kwang Yoo ^a   Kwon, Dongil ^b  

^a Hynix Semiconductor Inc   (South Korea)

^b Seoul National University   (South Korea)

Author keywords

in situ SEM indentation; KOZ (keep out zone); micropartial residual stress; PIT (picoinstrumented indentation testing); TSV (through silicon via)

Indexed keywords

CONTACT AREAS; EXPERIMENTAL APPROACHES; EXPERIMENTAL MEASUREMENTS; FINITE ELEMENT SIMULATIONS; IN-SITU; IN-SITU SEM; INDENTATION DEPTH; INDENTATION METHOD; INDENTATION TESTING; INSTRUMENTED INDENTATION TESTING; KEEP-OUT-ZONE; MICROSTRUCTURAL ANALYSIS; PLASTIC PILE-UP; SAMPLE PREPARATION; SCANNING ELECTRON MICROSCOPE; SIMPLE ALGORITHM; STRESS-FREE STATE; STRESSED STATE; THROUGH-SILICON-VIA; WEAK POINTS;

ALGORITHMS; RESIDUAL STRESSES; SCANNING ELECTRON MICROSCOPY; STRESS ANALYSIS;

INDENTATION;

EID: 84866861687     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2012.6248921     Document Type: Conference Paper

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