Numerical and experimental study on Cu protrusion of Cu-filled through-silicon vias (TSV)

2011 IEEE International 3D Systems Integration Conference, 3DIC 2011

Volumn , Issue , 2011, Pages

  Che, F X ^a   Putra, W N ^a,b   Heryanto, A ^a,c   Trigg, A ^a   Gao, S ^a   Gan, C L ^b  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^c NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Cu Annealing; Cu Protrusion; Finite Element Analysis; Through Silicon Via

Indexed keywords

AFM; ANNEALING TEMPERATURES; ATOMIC FORCE MICROSCOPE (AFM); BACK END OF LINES; ELECTRON BACKSCATTER DIFFRACTION TECHNIQUE; FABRICATION PROCESS; FORM FACTORS; GRAIN SIZE DISTRIBUTION; HIGH STRESS; METAL LAYER; MULTI-FUNCTIONS; NITROGEN GAS; NUMERICAL AND EXPERIMENTAL STUDY; NUMERICAL RESULTS; PACKAGING TECHNOLOGIES; PARAMETRIC STUDY; PROTRUSION SHAPE; THREE DIMENSIONAL INTEGRATED CIRCUITS; THROUGH SILICON VIAS; THROUGH-SILICON VIA;

APPROXIMATION THEORY; ATOMIC FORCE MICROSCOPY; AUTOMOBILE MANUFACTURE; COMPUTER SIMULATION; ELECTRONICS PACKAGING; FABRICATION; FINITE ELEMENT METHOD; GRAIN SIZE AND SHAPE; SCANNING ELECTRON MICROSCOPY; SILICON WAFERS;

ANNEALING;

EID: 84866856877     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2012.6262985     Document Type: Conference Paper

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