Three dimensional metallization for vertically integrated circuits (Invited lecture)

Microelectronic Engineering

Volumn 37-38, Issue , 1997, Pages 39-47

  Ramma, P ^a   Bollmann, D ^a   Braun, R ^a   Buchner, R ^a   Cao Minh, U ^a   Engelhardt, M ^b   Errmann, G ^a   Grassl T ^a   Hieber, K ^a   Hubner H ^b   Kawala, G ^a   Kleiner, M ^b   Klumpp, A ^a   Kuhn S ^b   Landesberger, C ^a   Lezec, H ^c   Muth, W ^a   Pamler, W ^b   Popp, R ^a   Renner, E ^b   Ruhl, G ^a   Sanger A ^b   Scheler, U ^b   Schertel, A ^c   Schmidt, C ^b   Schwarzl, S ^b   Weber, J ^a   Weber, W ^b   more..

^a Fraunhofer Institut fur Festkorpertechnologie   (Germany)

^b SIEMENS AG   (Germany)

^c Laboratories Europe GmbH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ASPECT RATIO; CMOS INTEGRATED CIRCUITS; ELECTRIC WIRING; METALLIZING; MICROELECTRONIC PROCESSING;

VERTICALLY INTEGRATED CIRCUITS (VIC);

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0031270573     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/s0167-9317(97)00092-0     Document Type: Article

References (9)

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