A preliminary study on the thermal and mechanical performances of sintered nano-scale silver die-attach technology depending on the substrate metallization

Microelectronics Reliability

Volumn 52, Issue 9-10, 2012, Pages 2321-2325

  Le Henaff, F ^a   Azzopardi, S ^a   Deletage, J Y ^a   Woirgard, E ^a   Bontemps, S ^b   Joguet, J ^c  

^a UNIVERSITÉ DE BORDEAUX   (France)

^b MICROSEMI CORPORATION   (United States)

^c Cookson Electronics ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MECHANICAL PERFORMANCE; NANO SCALE;

DIES; METALLIZING; NANOTECHNOLOGY; SILVER; SINTERING;

TECHNOLOGY;

EID: 84866737910     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2012.06.121     Document Type: Article

References (12)

1. V. Manikam Die attach materials for high temperature applications: a review components IEEE Trans Pack Manuf Technol 1 2011 457 478
2. Y. Li Recent advances of conductive adhesives as a lead-free alternative in electronic packaging: materials, processing, reliability and applications Mater Sci Eng 2006
3. Guth K et al. New assembly and interconnects beyond sintering methods. In: Proceedings of PCIM; 2010. p. 232-37
4. C. Göbl Low temperature sinter technology die attachment for automotive power electronic applications Automot Power Electron 2006 5
5. Wissam W et al. Evaluation of silver-sintering die attach. In: CIPS 2012. Nuremberg, 6-8 March 2012.
6. Zhang Z. Processing and characterization of micro-scale and nanoscale silver paste for power semiconductor device attachment. PhD thesis. USA: Virginia Polytechnic Institute; 2005.
7. Schwarzbauer Novel large area joining technique for improved device performance IEEE Trans Ind Appl 27 1 1991
8. T. Wang Low-temperature sintering with nano-silver paste in die-attached interconnection J Electron Mater 36 10 2007
9. Schmitt W. Novel silver contact paste lead free solution for die-attach. CIPS; 2010.
10. Lu G et al. Low-temperature and pressure-less sintering technology for high-performance and high-temperature interconnection of semiconductor devices. In: IEEE, 8th. Int conf on thermal, mechanical and multiphysics simulation and experiments in micro-electronics and micro-Systems, EuroSime; 2007.
11. Zheng H et al. Low-pressure (<5 MPa) low-temperature joining of large-area chips on copper using nanosilver paste. In: CIPS 2012. Nuremberg, 6-8 March 2012.
12. J. Kähler Pick-and-place silver sintering die attach of small-area chips IEEE Trans Comp Pack Manuf Technol 2011